A transient voltage suppressor (TVS) device uses a punch-through silicon controlled rectifier (SCR) structure for the high-side steering diode and/or the low-side steering diode where the punch-through SCR structure realizes low capacitance at the protected node. In some embodiments, the breakdown voltage of the TVS device is tailored by connecting two or more forward biased diodes in series. The low capacitance TVS device can be configured for unidirectional or bidirectional applications. In some embodiments, the TVS device includes a MOS-triggered silicon controlled rectifier as the high-side steering diode. The breakdown voltage of the TVS device can be adjusted by adjusting the threshold voltage of the MOS transistor.

A transient voltage suppressor (TVS) device uses a punch-through silicon controlled rectifier (SCR) structure for the high-side steering diode and/or the low-side steering diode where the punch-through SCR structure realizes low capacitance at the protected node. In some embodiments, the breakdown voltage of the TVS device is tailored by connecting two or more forward biased diodes in series. The low capacitance TVS device can be configured for unidirectional or bidirectional applications. In some embodiments, the TVS device includes a MOS-triggered silicon controlled rectifier as the high-side steering diode. The breakdown voltage of the TVS device can be adjusted by adjusting the threshold voltage of the MOS transistor.

The present disclosure provides a silicon-controlled rectifier structure and a manufacturing method therefor. The silicon-controlled rectifier structure comprises a substrate; and an N-Well and a P-Well in the substrate, and an N-type heavily-doped region and a P-type heavily-doped region which are connected to an anode are provided in the N-Well, and a guard ring connected to the anode is further provided in the N-Well between the N-type heavily-doped region and the P-type heavily-doped region, the guard ring being spaced from the N-type heavily-doped region by a shallow trench isolation, and an active area having a predetermined width exists between the guard ring and the P-type heavily-doped region; and an N-type heavily-doped region and a P-type heavily-doped region which are connected to a cathode are provided in the P-Well.

A bidirectional Zener diode includes a substrate, a first conductivity type base region formed at a front surface portion of the substrate, a second conductivity type first impurity region formed at the base region, a second conductivity type second impurity region formed at the base region away from the first impurity region, an insulating layer formed on a front surface of the substrate, a first electrode film formed on the insulating layer and electrically connected to the first impurity region, and a second electrode film formed on the insulating layer and electrically connected to the second impurity region, and a first region formed on the insulating layer, the first region being sandwiched between the first electrode film and the second electrode film, and the first region including a portion having an aspect ratio of 1 or larger.

A silicon carbide semiconductor device has a silicon carbide semiconductor substrate of a first conductivity type; a first semiconductor layer of the first conductivity type; a second semiconductor layer of a second conductivity type; first semiconductor regions of the first conductivity type; trenches; gate insulating films; gate electrodes; first high-concentration regions of the second conductivity type provided at positions facing the trenches in a depth direction; second high-concentration regions of the second conductivity type, selectively provided between the trenches and in contact with the first semiconductor regions, each having an upper surface exposed at the surface of the second semiconductor layer and a lower surface partially in contact with upper surfaces of the first high-concentration regions; a first electrode; and a second electrode. The second high-concentration regions are disposed periodically in a longitudinal direction of the trenches.

An inverse diode die is fast (i.e., has a small peak reverse recovery current) due to the presence of a novel topside P+ type charge carrier extraction region and a lightly-doped bottomside transparent anode. During forward conduction, the number of charge carriers in the N? type drift region is reduced due to holes being continuously extracted by an electric field set up by the P+ type charge carrier extraction region. Electrons are extracted by the transparent anode. When the voltage across the device is then reversed, the magnitude of the peak reverse recovery current is reduced due to there being a smaller number of charge carriers that need to be removed before the diode can begin reverse blocking mode operation. Advantageously, the diode is fast without having to include lifetime killers or otherwise introduce recombination centers. The inverse diode therefore has a desirably small reverse leakage current.

The disclosure provides a structure with a buried doped region, and methods to form the same. A structure may include a semiconductor substrate including a first well. A first terminal includes a first doped region in the first well. A second terminal includes a second doped region in the first well. The first well horizontally separates the first doped region from the second doped region. A first buried doped region is in the first well. The first buried doped region overlaps with, and is underneath, the first doped region. The first well vertically separates the first doped region from the first buried doped region.

A transient voltage suppressor (TVS) device includes a MOS-triggered silicon controlled rectifier (SCR) as the high-side steering diode and a silicon controlled rectifier (SCR) for the low-side steering diode. In one embodiment, the MOS-triggered SCR includes alternating p-type and n-type regions and a diode-connected MOS transistor integrated therein to trigger the silicon controlled rectifier to turn on. In one embodiment, the SCR of the low-side steering diode includes alternating p-type and n-type regions where the p-type region adjacent the n-type region forming the cathode terminal is not biased to any electrical potential.

A semiconductor protection device includes: an N-type epitaxial layer, a device isolation layer disposed in the N-type epitaxial layer, an N-type drift region disposed below the device isolation layer, an N-type well disposed in the N-type drift region, first and second P-type drift regions, respectively disposed to be in contact with the device isolation layer, and spaced apart from the N-type drift region, first and second P-type doped regions, respectively disposed in the first and second P-type drift regions, first and second N-type floating wells, respectively disposed in the first and second P-type drift regions to be spaced apart from the first and second P-type doped regions, and disposed to be in contact with the device isolation layer, and first and second contact layer, respectively disposed to cover the first and second N-type floating well, to be in contact with the device isolation layer.

An inverse diode die is fast (i.e., has a small peak reverse recovery current) due to the presence of a novel topside P+ type charge carrier extraction region and a lightly-doped bottomside transparent anode. During forward conduction, the number of charge carriers in the N-type drift region is reduced due to holes being continuously extracted by an electric field set up by the P+ type charge carrier extraction region. Electrons are extracted by the transparent anode. When the voltage across the device is then reversed, the magnitude of the peak reverse recovery current is reduced due to there being a smaller number of charge carriers that need to be removed before the diode can begin reverse blocking mode operation. Advantageously, the diode is fast without having to include lifetime killers or otherwise introduce recombination centers. The inverse diode therefore has a desirably small reverse leakage current.