A power control switch assembly. The assembly may include a thyristor device, where the thyristor device includes a first device terminal, a second device terminal, and a gate terminal> The assembly may include a negative temperature coefficient (NTC) device, electrically coupled to the gate terminal of the thyristor device on a first end, and electrically coupled to the first device terminal of the thyristor device on a second end, wherein the NTC device is thermally coupled to the thyristor device.

A power control switch assembly. The assembly may include a thyristor device, where the thyristor device includes a first device terminal, a second device terminal, and a gate terminal> The assembly may include a negative temperature coefficient (NTC) device, electrically coupled to the gate terminal of the thyristor device on a first end, and electrically coupled to the first device terminal of the thyristor device on a second end, wherein the NTC device is thermally coupled to the thyristor device.

Methods, apparatus, and processor-readable storage media for automatically limiting power consumption by devices using infrared or radio communications are provided herein. An example computer-implemented method includes detecting, via at least one photodiode of an emitting sensor, one or more signals output by a user device within a predetermined proximity; automatically transitioning, via utilizing at least one transistor connected to the photodiode, and in response to detecting the one or more signals, the emitting sensor from a first power-consumption state to a second power-consumption state; transmitting one or more signals in response to transitioning from the first power-consumption state to the second power-consumption state; and subsequent to transmitting, automatically transitioning, via utilizing the at least one transistor, the emitting sensor from the second power-consumption state to the first power-consumption state after a predetermined amount of time has elapsed during which no signals were detected.

Methods, apparatus, and processor-readable storage media for automatically limiting power consumption by devices using infrared or radio communications are provided herein. An example computer-implemented method includes detecting, via at least one photodiode of an emitting sensor, one or more signals output by a user device within a predetermined proximity; automatically transitioning, via utilizing at least one transistor connected to the photodiode, and in response to detecting the one or more signals, the emitting sensor from a first power-consumption state to a second power-consumption state; transmitting one or more signals in response to transitioning from the first power-consumption state to the second power-consumption state; and subsequent to transmitting, automatically transitioning, via utilizing the at least one transistor, the emitting sensor from the second power-consumption state to the first power-consumption state after a predetermined amount of time has elapsed during which no signals were detected.

A semiconductor structure is provided, which includes a semiconductor device, a first conductive layer, and a gate runner. The semiconductor device includes an upper surface, a gate terminal, a source terminal, and a drain terminal. The first conductive layer is deposited on the upper surface and coupled to the source terminal. The gate runner is overlapped with the first conductive layer and coupled to the gate terminal. The gate runner and the first conductive layer are configured to contribute a parasitic capacitance between the gate terminal and the source terminal.

A gate-turn-off thyristor is provided. The gate-turn-off thyristor includes a plurality of strips formed by repeatedly arranging a plurality of N-type emitter regions with high doping concentration of an upper transistor on an upper surface of an N-type silicon substrate with high resistivity, wherein a periphery of each strip of the plurality of strips is surrounded with a P-type dense base region bus bar of the upper transistor, a cathode metal layer is disposed on an N-type emitter region of the plurality of N-type emitter regions of the upper transistor, and a P-type base region of the upper transistor is disposed below the N-type emitter region of the upper transistor; a side of the P-type base region of the upper transistor is connected to a P-type dense base region of the upper transistor or a P-type dense base region bus bar of the upper transistor.

A gate-turn-off thyristor is provided. The gate-turn-off thyristor includes a plurality of strips formed by repeatedly arranging a plurality of N-type emitter regions with high doping concentration of an upper transistor on an upper surface of an N-type silicon substrate with high resistivity, wherein a periphery of each strip of the plurality of strips is surrounded with a P-type dense base region bus bar of the upper transistor, a cathode metal layer is disposed on an N-type emitter region of the plurality of N-type emitter regions of the upper transistor, and a P-type base region of the upper transistor is disposed below the N-type emitter region of the upper transistor; a side of the P-type base region of the upper transistor is connected to a P-type dense base region of the upper transistor or a P-type dense base region bus bar of the upper transistor.

A power control switch assembly. The assembly may include a thyristor device, where the thyristor device includes a first device terminal, a second device terminal, and a gate terminal> The assembly may include a negative temperature coefficient (NTC) device, electrically coupled to the gate terminal of the thyristor device on a first end, and electrically coupled to the first device terminal of the thyristor device on a second end, wherein the NTC device is thermally coupled to the thyristor device.

A power control switch assembly. The assembly may include a thyristor device, where the thyristor device includes a first device terminal, a second device terminal, and a gate terminal> The assembly may include a negative temperature coefficient (NTC) device, electrically coupled to the gate terminal of the thyristor device on a first end, and electrically coupled to the first device terminal of the thyristor device on a second end, wherein the NTC device is thermally coupled to the thyristor device.

A light-emitting component includes a light-emitting element, a driving thyristor, and a light-absorbing layer. The light-emitting element emits light of a predetermined wavelength. The driving thyristor causes the light-emitting element to emit light or causes an amount of light emitted by the light-emitting element to increase, upon entering an on-state. The light-absorbing layer is disposed between the light-emitting element and the driving thyristor such that the light-emitting element and the driving thyristor are stacked, and absorbs light emitted by the driving thyristor.