A nanowire transistor includes undoped source and drain regions electrically coupled with a channel region. A source stack that is electrically isolated from a gate conductor includes an interfacial layer and a source conductor, and is coaxially wrapped completely around the source region, extending along at least a portion of the source region. A Schottky barrier between the source conductor and the source region is a negative Schottky barrier and a concentration of free charge carriers is induced in the semiconductor source region.

Techniques are disclosed for forming semiconductor integrated circuits including one or more of source and drain contacts and gate electrodes comprising crystalline alloys including a transition metal. The crystalline alloys help to reduce contact resistance to the semiconductor devices. In some embodiments of the present disclosure, this reduction in contact resistance is accomplished by aligning the work function of the crystalline alloy with the work function of the source and drain regions such that a Schottky barrier height associated with an interface between the crystalline alloys and the source and drain regions is in a range of 0.3 eV or less.

Circuits, systems, devices, and methods related to transistors with Schottky barriers are discussed herein. For example, a method of fabricating a transistor can include forming a p-well or an n-well in a substrate and forming a gate for the transistor. The method can also include doping a region within the p-well or n-well with a concentration below a threshold and forming a conductor layer on the doped region.

Circuits, systems, devices, and methods related to a switch with an integrated Schottky barrier contact are discussed herein. For example, a radio-frequency switch can include an input node, an output node, and a transistor connected between the input node and the output node. The transistor can be configured to control passage of a radio-frequency signal from the input node to the output node. The transistor can include a first Schottky diode integrated into a drain of the transistor and/or a second Schottky diode integrated into a source of the transistor. The first Schottky diode and/or the second Schottky diode can be configured to compensate a non-linearity effect of the radio-frequency switch.

A lateral DMOS transistor structure includes a substrate of a first dopant polarity, a body region of the first dopant polarity, a source region, a drift region of a second dopant polarity, a drain region, a channel region, a gate structure over the channel region, a hybrid contact implant, of the second dopant polarity, in the source region, and a respective metal contact on or within each of the source region, gate structure, and drain region. The hybrid contact implant and the metal contact together form a hybrid contact defining first, second, and third electrical junctions. The first junction is a Schottky junction formed vertically between the source metal contact and the body. The second junction is an ohmic junction formed laterally between the source metal contact and the hybrid contact implant. The third junction is a rectifying PN junction between the hybrid contact implant and the channel region.

A wide gap semiconductor device has: a first MOSFET region (M0) having a first gate electrode 10 and a first source region 30 provided in a first well region 20 made of a second conductivity type; a second MOSFET region (M1) provided below a gate pad 100 and having a second gate electrode 110 and a second source region 130 provided in a second well region 120 made of the second conductivity type; and a built-in diode region electrically connected to the second gate electrode 110. The second source region 130 of the second MOSFET region (M1) is electrically connected to the gate pad 100.

A semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and at least one of a first switch disposed between the first potential supply line and the functional circuit and a second switch disposed between the second potential supply line and the functional circuit. The first switch and the second switch are negative capacitance FET.

A semiconductor device including a field effect transistor (FET) device includes a substrate and a channel structure formed of a two-dimensional (2D) material over the substrate. Source and drain contacts are formed partially over the 2D material. A first dielectric layer is formed at least partially over the channel structure and at least partially over the source and drain contacts. The first dielectric layer is configured to trap charge carriers. A second dielectric layer is formed over the first dielectric layer, and a gate electrode is formed over the second dielectric layer.

Semiconductor devices having metallic source and drain regions are described. For example, a semiconductor device includes a gate electrode stack disposed above a semiconducting channel region of a substrate. Metallic source and drain regions are disposed above the substrate, on either side of the semiconducting channel region. Each of the metallic source and drain regions has a profile. A first semiconducting out-diffusion region is disposed in the substrate, between the semiconducting channel region and the metallic source region, and conformal with the profile of the metallic source region. A second semiconducting out-diffusion region is disposed in the substrate, between the semiconducting channel region and the metallic drain region, and conformal with the profile of the metallic drain region.

A method of forming a semiconductor device can be provided by forming an opening that exposes a surface of an elevated source/drain region. The size of the opening can be reduced and a pre-amorphization implant (PAI) can be performed into the elevated source/drain region, through the opening, to form an amorphized portion of the elevated source/drain region. A metal-silicide can be formed from a metal and the amorphized portion.