H01L2224/03849

STRUCTURES AND METHODS FOR CAPACITIVE ISOLATION DEVICES

Described examples include a packaged device including a first object and a second object spaced from each other by a gap, each object having a first surface and an opposite second surface, the first surfaces of the first object and the second object including first terminals. A structure includes at least two conductors embedded in a dielectric casing consolidating a configuration and organization of the at least two conductors, the at least two conductors having end portions un-embedded by the dielectric casing. An end portion of at least one of the at least two conductors is electrically connected to a first terminal of the first object, and an opposite end portion of the at least one of the at least two conductors is electrically connected to a respective first terminal of the second object, the at least two conductors electrically connecting the first object and the second object.

LEAD-FREE SOLDER JOINING OF ELECTRONIC STRUCTURES

A method and structure for joining a semiconductor device and a laminate substrate or two laminate substrates where the joint is formed with lead free solders and lead free compositions. The various lead free solders and lead free compositions are chosen so that there is a sufficient difference in liquidus temperatures such that some components may be joined to, or removed from, the laminate substrate without disturbing other components on the laminate substrate.

Conductive connections, structures with such connections, and methods of manufacture
10090231 · 2018-10-02 · ·

A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

Conductive connections, structures with such connections, and methods of manufacture
10090231 · 2018-10-02 · ·

A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

HYBRID LOW METAL LOADING FLUX

Flux formulations and solder attachment during the fabrication of electronic device assemblies are described. One flux formation includes a flux component and a metal particle component, the metal particle component being present in an amount of from 5 to 35 volume percent of the flux formulation. In one feature of certain embodiments, the metal particle component includes solder particles. Other embodiments are described and claimed.

HYBRID LOW METAL LOADING FLUX

Flux formulations and solder attachment during the fabrication of electronic device assemblies are described. One flux formation includes a flux component and a metal particle component, the metal particle component being present in an amount of from 5 to 35 volume percent of the flux formulation. In one feature of certain embodiments, the metal particle component includes solder particles. Other embodiments are described and claimed.

THIN FILM ELEMENT AND METHOD FOR MANUFACTURING THE SAME
20180226346 · 2018-08-09 ·

A thin film element that includes a base material, a wiring conductor film disposed on the surface of the base material, a protective film that covers the surface of at least the wiring conductor film, an outer electrode, and a first resist film and a second resist film that cover the surface of the protective film. The protective film has a contact hole at a location overlapping the wiring conductor film. The outer electrode is disposed in the contact hole and on the surface of the wiring conductor film. The outer electrode is thicker than the protective film and has a side surface. The first resist film is in contact with the entire circumference of the side surface of the outer electrode, and the second resist film is disposed at a distance from the side surface of the outer electrode and the first resist film.

MULTI-LAYER REDISTRIBUTION LAYER FOR WAFER-LEVEL PACKAGING
20180182726 · 2018-06-28 · ·

Aspects of the embodiments include a semiconductor package that includes a printed circuit board (PCB) and a semiconductor die. The semiconductor die including an interconnect landing pad on an active side of the semiconductor die; a solder material on the interconnect landing pad; a partial redistribution layer on the active side of the semiconductor die; and a protection layer on the partial redistribution layer, the protection layer comprising the solder material. The semiconductor die is electrically connected to the PCB by the solder material on the interconnect landing pad. The partial redistribution layer and the protection layer are separated from the printed circuit board by an air gap.

MULTI-LAYER REDISTRIBUTION LAYER FOR WAFER-LEVEL PACKAGING
20180182726 · 2018-06-28 · ·

Aspects of the embodiments include a semiconductor package that includes a printed circuit board (PCB) and a semiconductor die. The semiconductor die including an interconnect landing pad on an active side of the semiconductor die; a solder material on the interconnect landing pad; a partial redistribution layer on the active side of the semiconductor die; and a protection layer on the partial redistribution layer, the protection layer comprising the solder material. The semiconductor die is electrically connected to the PCB by the solder material on the interconnect landing pad. The partial redistribution layer and the protection layer are separated from the printed circuit board by an air gap.

Hybrid low metal loading flux

Flux formulations and solder attachment during the fabrication of electronic device assemblies are described. One flux formation includes a flux component and a metal particle component, the metal particle component being present in an amount of from 5 to 35 volume percent of the flux formulation. In one feature of certain embodiments, the metal particle component includes solder particles. Other embodiments are described and claimed.