There is provided a terminal that includes a first conductive layer; a wiring layer on the first conductive layer; a second conductive layer on the wiring layer; and a conductive bonding layer which is in contact with a bottom surface and a side surface of the first conductive layer, a side surface of the wiring layer, a portion of a side surface of the second conductive layer, and a portion of a bottom surface of the second conductive layer, wherein an end portion of the second conductive layer protrudes from an end portion of the first conductive layer and an end portion of the wiring layer, and wherein the conductive bonding layer is in contact with a bottom surface of the end portion of the second conductive layer.

Embodiments include semiconductor packages and methods to form the semiconductor packages. A semiconductor package includes a plurality of first dies on a substrate, an interface layer over the first dies, a backside metallization (BSM) layer directly on the interface layer, where the BSM layer includes first, second, and third conductive layer, and a heat spreader over the BSM layer. The first conductive layer includes a titanium material. The second conductive layer includes a nickel-vanadium material. The third conductive layer includes a gold material, a silver material, or a copper material. The copper material may include copper bumps. The semiconductor package may include a plurality of second dies on a package substrate. The substrate may be on the package substrate. The second dies may have top surfaces substantially coplanar to top surface of the first dies. The BSM and interface layers may be respectively over the first and second dies.

Embodiments include semiconductor packages and methods to form the semiconductor packages. A semiconductor package includes a plurality of first dies on a substrate, an interface layer over the first dies, a backside metallization (BSM) layer directly on the interface layer, where the BSM layer includes first, second, and third conductive layer, and a heat spreader over the BSM layer. The first conductive layer includes a titanium material. The second conductive layer includes a nickel-vanadium material. The third conductive layer includes a gold material, a silver material, or a copper material. The copper material may include copper bumps. The semiconductor package may include a plurality of second dies on a package substrate. The substrate may be on the package substrate. The second dies may have top surfaces substantially coplanar to top surface of the first dies. The BSM and interface layers may be respectively over the first and second dies.

A semiconductor package may include a base, a first chip on the base, and first connection patterns that connect and couple the base and the first chip. The first chip may include a substrate, pad patterns on the substrate, a passivation layer on the substrate and having openings, and pillars on the substrate, the pad patterns include a first signal pad and a second signal pad, the first connection patterns are in contact with the pillars, the pillars include a first signal pillar in contact with the first signal pad and a second signal pillar in contact with the second signal pad, the openings in the passivation layer include a first opening having a sidewall facing a side surface of the first signal pillar and surrounding the side surface of the first signal pillar, and a second opening having a sidewall facing a side surface of the second signal pillar and surrounding the side surface of the second signal pillar, and a maximum width of the second opening is greater than a maximum width of the first opening.

To provide a wound body of a sheet for sintering bonding with a base material that realizes a satisfactory operational efficiency in a process of producing a semiconductor device comprising sintering bonding portions of semiconductor chips and that also has both a satisfactory storage stability and a high storage efficiency. A wound body 1 according to the present invention has a form in which a sheet for sintering bonding with a base material X is wound around a winding core 2 into a roll shape, the sheet for sintering bonding with a base material X having a laminated structure comprising: a base material 11; and a sheet for sintering bonding 10, comprising an electrically conductive metal containing sinterable particle and a binder component.

To provide a wound body of a sheet for sintering bonding with a base material that realizes a satisfactory operational efficiency in a process of producing a semiconductor device comprising sintering bonding portions of semiconductor chips and that also has both a satisfactory storage stability and a high storage efficiency. A wound body 1 according to the present invention has a form in which a sheet for sintering bonding with a base material X is wound around a winding core 2 into a roll shape, the sheet for sintering bonding with a base material X having a laminated structure comprising: a base material 11; and a sheet for sintering bonding 10, comprising an electrically conductive metal containing sinterable particle and a binder component.

A chip bonding method includes the following operations. A first chip is provided, which includes a first contact pad including a first portion lower than a first surface of a first substrate and a second portion higher than the first surface of the first substrate to form the stepped first contact pad. A second chip is provided, which includes a second contact pad including a third portion lower than a third surface of a second substrate and a fourth portion higher than the third surface of the second substrate to form the stepped second contact pad. The first chip and the second chip are bonded. The first portion of the first chip contacts with the fourth portion of the second chip, and the second portion of the first chip contacts with the third portion of the second chip.

A display apparatus includes: a circuit substrate; and a pixel array on the circuit substrate and including a plurality of pixels. The pixel array includes: light emitting diode (LED) cells constituting the plurality of pixels, each of the LED cells including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer; wavelength converters on the LED cells; an upper semiconductor layer on the LED cells and having a partition structure; a passivation layer on side surfaces of the LED cells; a first electrode along a region of the LED cells to have a grid shape; second electrodes connected to the second conductivity-type semiconductor layers; and reflective layers between the first electrode and the second electrode along the passivation layer on the side surfaces of the LED cells and having surfaces inclined toward outside of the LED cells.

The present application discloses a method for fabricating a semiconductor device with a pad structure. The method includes providing a substrate, forming a capacitor structure above the substrate, forming a plurality of passivation layers above the capacitor structure, forming a pad opening in the plurality of passivation layers, performing a passivation process comprising soaking the pad opening in a precursor, and forming a pad structure in the pad opening. The precursor is dimethylaminotrimethylsilane or tetramethylsilane. Forming the pad structure in the pad opening comprises forming a pad bottom conductive layer comprising nickel in the pad opening and forming a pad top conductive layer on the pad bottom conductive layer. The pad top conductive layer comprises palladium, cobalt, or a combination thereof.

A semiconductor structure includes: a first substrate, with a first opening being provided on a surface of first substrate; and a first bonding structure positioned in the first opening. The first bonding structure includes a first metal layer and a second metal layer with a melting point lower than that of the first metal layer. The first metal layer includes a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface, the second surface is provided with a first groove, an area, not occupied by the first metal layer and the first groove, of the first opening constitutes a second groove, the second metal layer is formed in the first groove and the second groove, and a surface, exposed from the second groove, of the second metal layer constitutes a bonding surface of the first bonding structure.