A method of treatment of an electronic circuit including at a location at least one electrically-conductive test pad having a first exposed surface. The method includes the at least partial etching of the test pad from the first surface, and the forming on the electronic circuit of an interconnection level covering said location and including, on the side opposite to said location, a second planar surface adapted for the performing of a hybrid molecular bonding.

A display device includes a substrate including a first surface, a second surface opposite to the first surface, a first chamfered surface extending from one side of the first surface, a second chamfered surface extending from one side of the second surface, and a side surface connecting the first chamfered surface to the second chamfered surface, a pixel on the first surface of the substrate and including a light emitting element to emit light, a plurality of front pad parts on an edge of the first surface of the substrate and electrically connected to the pixel, a plurality of rear pad parts on an edge of the second surface of the substrate, and a plurality of side surface connection lines on the side surface of the substrate electrically connecting the plurality of front pad parts to the plurality of rear pad parts.

A sensor package structure is provided and includes a substrate, a sensor chip, a ring-shaped supporting layer, and a light-permeable sheet. The sensor chip is disposed on and electrically coupled to the substrate. The ring-shaped supporting layer is disposed on the sensor chip and surrounds a sensing region of the sensor chip. The light-permeable sheet has a ring-shaped notch recessed in a peripheral edge of an inner surface of the light-permeable sheet, and a depth of the ring-shaped notch with respect to the inner surface is at least 10 tim. The light-permeable sheet is disposed on the ring-shaped supporting layer through the ring-shaped notch, and the inner surface is not in contact with the ring-shaped supporting layer, so that the inner surface of the light-permeable sheet, an inner side of the ring-shaped supporting layer, and the top surface of the sensor chip jointly define an enclosed space.

A semiconductor module includes a first power semiconductor device, a conductive wire, and a resin film. The conductive wire is joined to a surface of a first front electrode of the first power semiconductor device. The resin film is formed to be continuous on at least one of an end portion or an end portion of a first joint between the first front electrode and the conductive wire in a longitudinal direction of the conductive wire, a surface of the first front electrode, and a surface of the conductive wire. The resin film has an elastic elongation rate of 4.5% to 10.0%.

In a method of manufacturing a semiconductor device first conductive layers are formed over a substrate. A first photoresist layer is formed over the first conductive layers. The first conductive layers are etched by using the first photoresist layer as an etching mask, to form an island pattern of the first conductive layers separated from a bus bar pattern of the first conductive layers by a ring shape groove. A connection pattern is formed to connect the island pattern and the bus bar pattern. A second photoresist layer is formed over the first conductive layers and the connection pattern. The second photoresist layer includes an opening over the island pattern. Second conductive layers are formed on the island pattern in the opening. The second photoresist layer is removed, and the connection pattern is removed, thereby forming a bump structure.

A display device is provided. The display device comprising: a substrate including a display area and a pad area, a first conductive layer disposed on the substrate and including a first signal line disposed in the display area, a buffer layer disposed on the first conductive layer, a semiconductor layer disposed on the buffer layer in the display area, a gate insulating film disposed on the semiconductor layer, a second conductive layer disposed on the gate insulating film and including a gate electrode overlapping the semiconductor layer in the display area, a first electrode of a transistor disposed to overlap one side of the semiconductor layer in the display area and connected to the first signal line through a contact hole penetrating through the buffer layer and the gate insulating film, and a second electrode of the transistor disposed to overlap the other side of the semiconductor layer in the display area, a first pad disposed on the buffer layer in the pad area and exposed by a pad opening, a first insulating layer disposed on the second conductive layer and the first pad, and a light emitting element disposed on the first insulating layer in the display area, wherein the first pad is formed of the first conductive layer or the second conductive layer.

A display device includes a first planarization film including an opening, a reflective film provided on an inclined surface inside the opening in the first planarization film, an LED chip surrounded by the reflective film and provided inside the opening, and a second planarization film provided on the first planarization film, surrounding the LED chip, and filling the opening, wherein a height from an upper end of the inclined surface of the first planarization film to an interface with air in the second planarization film is 20 μm or less.

A method of testing a semiconductor device includes providing a first wafer that includes a first surface, a second surface that is allocated at an opposite side of the first surface, a first electrode penetrating the first wafer from the first surface to the second surface, and a pad formed on the first surface and coupled electrically with the first electrode, providing a second wafer that includes a second electrode penetrating the second wafer, stacking the first wafer onto the second wafer to connect the first electrode with the second electrode such that the second surface of the first wafer faces the second wafer, probing a needle to the pad, and supplying, in such a state that the first wafer is stacked on the second wafer, a test signal to the first electrode to input the test signal into the second wafer via the first electrode and the second electrode.

A display panel, a manufacturing method thereof, and a display device are disclosed. The display panel includes: a base substrate, provided with a terminal and a terminal protection layer pattern; the terminal protection layer pattern includes a first shielding region and a first opening region, an orthographic projection of the first shielding region on the base substrate and an orthographic projection of the terminal on the base substrate have an overlapping region, the overlapping region is located at an edge of the orthographic projection of the terminal on the base substrate, and an orthographic projection of the first opening region on the base substrate is located in the orthographic projection of the terminal on the base substrate.

A display device includes a scan write line configured to receive a scan write signal, a scan initialization line configured to receive a scan initialization signal, a sweep signal line configured to receive a sweep signal, a first data line configured to receive a first data voltage, a second data line configured to receive a second data voltage, and a subpixel connected to the scan write line, the scan initialization line, the sweep signal line, the first data line, and the second data line. The subpixel includes a light-emitting element, a first pixel driver including a first transistor configured to generate a control current according to the first data voltage of the first data line, and a second pixel driver including an eighth transistor configured to generate a driving current applied to the light-emitting element according to the second data voltage.