A display device includes a substrate including a display area and a pad area, a plurality of pad electrodes disposed in the pad area on the substrate, a circuit board disposed to overlap at least a portion of the pad area on the substrate, and an anisotropic conductive layer disposed in the pad area between the substrate and the circuit board. The circuit board includes a base substrate and a plurality of bump electrodes disposed on a lower surface of the base substrate. The anisotropic conductive layer includes an adhesive layer and a plurality of conductive particles arranged in the adhesive layer. Each of the conductive particles includes a core, a first conductive film disposed on the core in a way such that at least a portion of the core is exposed, and a second conductive film entirely covering the core and the first conductive film.

A method of repairing a display panel and a repaired display panel are provided. The display panel includes a panel substrate, a plurality of micro LEDs arranged on the panel substrate, and a molding member covering the plurality of micro LEDs. The molding member includes a first molding member and a second molding member disposed in a region surrounded by the first molding member. The second molding member has a composition or a shape different from that of the first molding member, and the second molding member surrounds at least one side surface of the plurality of micro LEDs.

Provided is a display panel, including a drive backplate, light emitting elements and a light reflecting layer located on the drive backplate, where the light reflecting layer includes a first light reflecting layer made of a metal and wrapping sidewalls of the light emitting elements, and the first light reflecting layer is configured to enable light emitted by each of the light emitting elements to be guided out from a top portion of the light emitting element. Further provided are a display apparatus and a method of manufacturing a display panel.

There is provided a semiconductor device including: a pad portion that is provided above the upper surface of the semiconductor substrate and that is separated from the emitter electrode; a wire wiring portion that is connected to a connection region on an upper surface of the pad portion; a wiring layer that is provided between the semiconductor substrate and the pad portion and that includes a region overlapping the connection region; an interlayer dielectric film that is provided between the wiring layer and the pad portion and that has a through hole below the connection region; a tungsten portion that contains tungsten and that is provided inside the through hole and electrically connects the wiring layer and the pad portion; and a barrier metal layer that contains titanium and that is provided to cover an upper surface of the interlayer dielectric film below the connection region.

A display device includes a driving member which provides an electrical signal and includes a connection terminal which transmits the electrical signal, a pad electrode which receives the electrical signal from the driving member and is electrically connected to the connection terminal of the driving member, an organic layer on the pad electrode, the organic layer including a side surface defining an opening of the organic layer which exposes the pad electrode to outside the organic layer and within the opening, a protrusion protruding from the side surface, and a connection conductive layer which electrically connects the pad electrode to the connection terminal, within the opening of the organic layer, where the connection conductive layer covers each of the pad electrode which is exposed by the opening of the organic layer, the side surface of the organic layer, and the protrusion of the organic layer.

A display panel includes a substrate including a display area and a pad area spaced apart from the display area, and an uneven pad disposed on the substrate in the pad area. The uneven pad includes a first conductive layer, a first organic layer disposed on the first conductive layer and having an upper surface having an uneven shape, and a second conductive layer disposed on the first organic layer.

A display device comprises a display panel including a display area including pixels, and a pad area adjacent to the display area, and a driving integrated circuit mounted on the pad area, wherein the pad area includes a stud pad area located at an edge of the pad area and including at least one stud pad electrode, the driving integrated circuit includes a circuit base, and at least one stud bump area overlapping the stud pad area in a thickness direction of the display device and including at least one stud bump, and the at least one stud pad electrode overlaps an edge portion of the at least one stud bump.

A redistribution layer for an integrated circuit is made by forming a conductive interconnection layer; forming a conductive body in electrical contract with the interconnection layer; and covering the conductive body with a first coating layer having a thickness less than 100 nm. The first coating layer is configured to provide a protection against oxidation and/or corrosion of the conductive body. To carry out an electrical test of the integrated circuit, a testing probe locally perforates the first coating layer until the conductive body is electrically contacted by the testing probe.

An integrated electronic circuit including: a dielectric body delimited by a front surface; A top conductive region of an integrated electronic circuit extend within a dielectric body having a front surface. A passivation structure including a bottom portion and a top portion laterally delimits an opening. The bottom portion extends on the front surface, and the top portion extends on the bottom portion. A field plate includes an internal portion and an external portion. The internal portion is located within the opening and extends on the top portion of the passivation structure. The external portion extends laterally with respect to the top portion of the passivation structure and contacts at a bottom one of: the dielectric body or the bottom portion of the passivation structure. The opening and the external portion are arranged on opposite sides of the top portion of the passivation structure.

A chip package includes a semiconductor structure and a redistribution layer. The semiconductor structure has a substrate, a first isolation layer, and a lower ground pad. The substrate has a top surface, a bottom surface opposite to the top surface, a through hole through the top surface and the bottom surface, and a sidewall surrounding the through hole. The first isolation layer is located on the top surface of the substrate, and the lower ground pad is located in the through hole. The redistribution layer extends from the bottom surface of the substrate to the lower ground pad along the sidewall. The redistribution layer covers the entire bottom surface of the substrate and electrically connects the lower ground pad.