H01L2224/11318

Conductive connections, structures with such connections, and methods of manufacture
09793198 · 2017-10-17 · ·

A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

LIGHT EMITTING DEVICE AND METHOD OF FABRICATING THE SAME
20170279020 · 2017-09-28 ·

Provided are a light emitting device and a method of fabricating the same. The light emitting device includes: a light emitting structure including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer and including a first surface and a second surface; first and second contact electrodes each ohmic-contacting the first and second conductivity type semiconductor layers; and first and second electrodes disposed on the first surface of the light emitting structure, in which the first and second electrodes each include sintered metal particles and the first and second electrodes each include inclined sides of which the tangential gradients with respect to sides of vertical cross sections thereof are changing.

Systems, methods and devices for inter-substrate coupling

Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.

Solder Material, Solder Joint, and Method of Manufacturing the Solder Material

Provided is a solder material which enables a growth of an oxide film to be inhibited. A solder ball which is a solder material is composed of a solder layer and a covering layer covering the solder layer. The solder layer is spherical and is composed of a metal material containing an alloy including Sn content of 40% and more. Otherwise the solder layer is composed of a metal material including Sn content of 100%. In the covering layer, a S.sub.nO film is formed outside the solder layer, and a S.sub.nO.sub.2 film is formed outside the S.sub.nO film. A thickness of the covering layer is preferably more than 0 nm and equal to or less than 4.5 nm. Additionally, a yellow chromaticity of the solder ball is preferably equal to or less than 5.7.

Chip to Chip Interconnect in Encapsulant of Molded Semiconductor Package

A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING DUMMY MICRO BUMPS BETWEEN STACKING DIES

A method of fabricating a semiconductor device is provided, including providing a base substrate and a die stacking unit mounted on the base substrate. Conductive joints are connected between two adjacent dies of the die stacking unit. The method further includes providing dummy micro bumps and dummy pads between the two adjacent dies and between the conductive joints. The dummy micro bumps and the dummy pads are connected to one of the two adjacent dies but not to the other, and the dummy micro bumps are formed on some of the dummy pads but not on all of the dummy pads. In addition, the method includes filling the gaps between the base substrate, all dies of the die stacking unit, the conductive joints, the dummy micro bumps, and the dummy pads with an underfill material by capillary attraction.

Light emitting diodes manufacture and assembly

A method for manufacturing LED devices is provided. The method comprises forming an epitaxial layer on a starter substrate, the epitaxial layer having a first surface that interfaces with the starter substrate and a second surface opposite to the first surface; establishing an adhesive bond between the second surface of the epitaxial layer and a carrier substrate having a pre-determined light transmittance; etching away the starter substrate; etching away part of the epitaxial layer to form a plurality of light emitting diode (LED) dies on a third surface of the epitaxial layer opposite to the second surface; establishing one or more conductive bonds between selected one or more LED dies, from the plurality of LED dies, and a backplane; weakening the adhesive bond between the second surface of the epitaxial layer and the carrier substrate; and moving the carrier substrate away from the backplane.

METHOD FOR FORMING CONDUCTIVE LAYER, AND CONDUCTIVE STRUCTURE AND FORMING METHOD THEREFOR
20220013479 · 2022-01-13 · ·

A method for forming the conductive layer includes: providing a first conductive film and a solution with a conductive material; coating a surface of the first conductive film with the solution, before performing the coating, a temperature of the first conductive film being lower than an evaporation temperature or a sublimation temperature of the solution; and in a process step of performing the coating or after performing the coating, heating the first conductive film, such that the temperature of the first conductive film is higher than or equal to the evaporation temperature or the sublimation temperature of the solution, and forming a second conductive film covering the surface of the first conductive film, wherein the second conductive film including the conductive material.

METHOD FOR CONNECTION BY BRAZING ENABLING IMPROVED FATIGUE RESISTANCE OF BRAZED JOINTS
20220001475 · 2022-01-06 ·

The connection method between at least two elements (E1, E2) corresponding to a printed circuit (4) and to an electronic component (5), comprises a step of forming a plurality of pad-type stacks (2) of bosses (3), the stacks (2) of bosses (3) being formed on a face (10) of a first (E1) of the elements (E1, E2), the stacks (2) of bosses (3) each comprising the same given number of bosses (3), said method also comprising a step of depositing a brazing product (7) on this first element (E1) provided with stacks (2) of bosses (3), a step of arranging the second (E2) of the elements (E1, E2) on the first element (E1), and a step of remelting the assembly thus formed, in order to obtain an electronic device (1). This method makes it possible to produce a precise and flexible raising of surface mounted electronic components.

Bump bond structure for enhanced electromigration performance

A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.