The present disclosure describes a coaxial-interconnect structure that is integrated into a semiconductor component and methods of forming the coaxial-interconnect structure. The coaxial interconnect-structure, which electrically couples circuitry of an integrated-circuit (IC) die to traces of a packaging substrate, comprises a signal core elongated about an axis, a ground shield elongated about the axis, and an insulator disposed between the signal core and the ground shield.

A method of producing a hybridized device including two microelectronic components, including a first microelectronic component having conductive inserts on a connection surface, and a second microelectronic component having ductile conductive pads on a surface opposed to the connection surface, is provided. The method includes the steps of hybridizing the first and second electronic components face-to-face by arranging the connection surface of the first microelectronic component to oppose the surface of the second microelectronic component having the ductile conductive pads, and establishing an electro-mechanical connection between the first microelectronic component and the second microelectronic component by inserting, at ambient temperature, inserts of the first microelectronic component, provided with a second metal sub-layer, into the ductile conductive pads of the second microelectronic component.

A bump structure includes a pad. A passivation layer covers a perimeter of the pad. The passivation layer includes an opening exposing an area of the pad. A first portion is disposed on the pad. The first portion includes a top surface and a sidewall. A second portion covers the top surface and entire sidewall of the first portion.

A bump structure includes a pad. A passivation layer covers a perimeter of the pad. The passivation layer includes an opening exposing an area of the pad. A first portion is disposed on the pad. The first portion includes a top surface and a sidewall. A second portion covers the top surface and entire sidewall of the first portion.

A spacer structure formed adjacent a solder connection which prevents solder extrusion and methods of manufacture are disclosed. The method includes forming a solder preform connection on a bond pad of a chip. The method further includes forming a spacer structure on sidewalls of the solder preform connection. The method further includes subjecting the solder preform connection to a predetermined temperature to form a solder connection with the spacer structure remaining thereabout.

An electronic device including a substrate, a conductive connector, a conductive bonding material, and a spacer layer is provided. The conductive connector is disposed on the substrate. The conductive bonding material is disposed on the conductive connector. The spacer layer laterally covers the conductive connector.

A semiconductor device assembly, comprising a first semiconductor device including a first substrate with a frontside surface, a plurality of solder bumps located on the frontside surface of the first substrate, and a first polymer layer on the frontside surface. The semiconductor device assembly also comprises a second semiconductor device including a second substrate with a backside surface, a plurality of TSVs protruding from the backside surface of the second substrate, and a second polymer layer on the backside surface of the first substrate, the second polymer layer having a plurality of openings corresponding to the plurality of TSVs. The first and second semiconductor devices are bonded such that the first polymer layer contacts the second polymer layer and each of the plurality of solder bumps extends into a corresponding one of the plurality of openings and contacts a corresponding one of the plurality of TSVs.

A semiconductor device assembly, comprising a first semiconductor device including a first substrate with a frontside surface, a plurality of solder bumps located on the frontside surface of the first substrate, and a first polymer layer on the frontside surface. The semiconductor device assembly also comprises a second semiconductor device including a second substrate with a backside surface, a plurality of TSVs protruding from the backside surface of the second substrate, and a second polymer layer on the backside surface of the first substrate, the second polymer layer having a plurality of openings corresponding to the plurality of TSVs. The first and second semiconductor devices are bonded such that the first polymer layer contacts the second polymer layer and each of the plurality of solder bumps extends into a corresponding one of the plurality of openings and contacts a corresponding one of the plurality of TSVs.