Patent classifications
H01L2224/16012
Semiconductor package and method for preparing the same
A semiconductor package includes a first device and a bump structure disposed over the first device. In some embodiments, the first device has a first upper surface and a first side, wherein the first upper surface and the first side form a first corner of the first device. In some embodiments, the bump structure is disposed over the first upper surface and extends laterally across the first side of the first device. The lateral extension of the bump structure across the first side of the semiconductor device can contact a corresponding conductor of a laterally adjacent device to implement a lateral signal path between the semiconductor device and the laterally adjacent device in the absence of a redistribution structure corresponding to the redistribution layer.
LEAD-FREE SOLDER JOINING OF ELECTRONIC STRUCTURES
A method and structure for joining a semiconductor device and a laminate substrate or two laminate substrates where the joint is formed with lead free solders and lead free compositions. The various lead free solders and lead free compositions are chosen so that there is a sufficient difference in liquidus temperatures such that some components may be joined to, or removed from, the laminate substrate without disturbing other components on the laminate substrate.
COMBING BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF
A manufacturing method of a combing bump structure is disclosed. In the manufacturing method, a semiconductor substrate is provided, a pad is formed on the semiconductor substrate, a conductive layer is formed on the pad, a solder bump is formed on the conductive layer, and at least two metal side walls are formed disposed along opposing laterals of the solder bump respectively.
REFLECTIVE INORGANIC THIN FILM FOR HIGH-DENSITY PANEL-SCALE RE-DISTRIBUTION LAYER (RDL)
Embodiments disclosed herein include package substrates. In an embodiment, the package substrate comprises a layer with a film over the layer. In an embodiment, the film is an inorganic material. In an embodiment, the package substrate may further comprise a plurality of electrically conductive traces over the film, and a seed layer between the plurality of electrically conductive traces and the film. In an embodiment, edges of the seed layer are substantially aligned with edges of the plurality of electrically conductive traces.
Combing bump structure and manufacturing method thereof
A combing bump structure includes a semiconductor substrate, a pad, a conductive layer, a solder bump and at least two metal side walls The pad is disposed on the semiconductor substrate. The conductive layer is disposed on the pad. The solder bump is disposed on the conductive layer. The at least two metal side walls are disposed along opposing outer side walls of the solder bump respectively.
SEMICONDUCTOR PACKAGE AND CHIP THEREOF
A semiconductor package includes a flexible circuit board and a chip which includes a first bump group and a second bump group. First bumps of the first bump group and second bumps of the second bump group are provided to be bonded to leads on the flexible circuit board. The second bumps are designed to be longer than the first bumps in length so as to increase bonding strength of the second bumps to the leads, prevent the leads from being shifted and separated from the first and second bumps and prevent lead bonding misalignment.
SEMICONDUCTOR PACKAGE AND METHOD FOR PREPARING THE SAME
A semiconductor package includes a first device and a bump structure disposed over the first device. In some embodiments, the first device has a first upper surface and a first side, wherein the first upper surface and the first side form a first corner of the first device. In some embodiments, the bump structure is disposed over the first upper surface and extends laterally across the first side of the first device. The lateral extension of the bump structure across the first side of the semiconductor device can contact a corresponding conductor of a laterally adjacent device to implement a lateral signal path between the semiconductor device and the laterally adjacent device in the absence of a redistribution structure corresponding to the redistribution layer.
Semiconductor substrate and semiconductor package structure having the same
A semiconductor package structure includes a substrate, a semiconductor chip, and a solder material. The substrate includes an insulating layer, a conductive circuit layer, and a conductive bump. The conductive circuit layer is recessed from a top surface of the insulating layer. The conductive circuit layer includes a pad, and a side surface of the pad extends along a side surface of the insulating layer. The conductive bump is disposed on the pad. A side surface of the conductive bump, a top surface of the pad and the side surface of the insulating layer together define an accommodating space. A solder material electrically connects the conductive bump and the semiconductor chip. A portion of the solder material is disposed in the accommodating space.
Semiconductor substrate and semiconductor package structure having the same
A semiconductor package structure includes a substrate, a semiconductor chip, and a solder material. The substrate includes an insulating layer, a conductive circuit layer, and a conductive bump. The conductive circuit layer is recessed from a top surface of the insulating layer. The conductive circuit layer includes a pad, and a side surface of the pad extends along a side surface of the insulating layer. The conductive bump is disposed on the pad. A side surface of the conductive bump, a top surface of the pad and the side surface of the insulating layer together define an accommodating space. A solder material electrically connects the conductive bump and the semiconductor chip. A portion of the solder material is disposed in the accommodating space.
Semiconductor device including semiconductor chip having elongated bumps
A semiconductor chip is mounted on a mounting substrate. The semiconductor chip includes plural first bumps on a surface facing the mounting substrate. The plural first bumps each have a shape elongated in a first direction in plan view and are arranged in a second direction perpendicular to the first direction. The mounting substrate includes, on a surface on which the semiconductor chip is mounted, at least one first land connected to the plural first bumps. At least two first bumps of the plural first bumps are connected to each first land. The difference between the dimension of the first land in the second direction and the distance between the outer edges of two first bumps at respective ends of the arranged first bumps connected to the first land is 20 m or less.