Patent classifications
H01L2224/27318
METHOD AND SYSTEM FOR ASSEMBLING MICROELECTRONIC COMPONENTS
The present disclosure provides a method and a system for assembling microelectronic components. The method includes: a substrate including a first surface is provided, the first surface includes a plurality of first areas and a second area surrounding each first area, the first area has a lyophilic surface, and the second area has a lyophobic surface; a plurality of adhesive liquid droplets automatically form on the first areas; and a plurality of microelectronic components on a carrier plate transferred onto the adhesive liquid droplets, wherein the microelectronic components are automatically aligned with the first areas to obtain an assembled structure.
Chip package structure with redistribution layer having bonding portion
A chip package structure is provided. The chip package structure includes a first redistribution layer having a bonding portion. The bonding portion includes a dielectric layer. The chip package structure includes a chip structure bonded to the bonding portion. A first width of the dielectric layer of the bonding portion is substantially equal to a second width of the chip structure. The chip package structure includes a protective layer over the first redistribution layer and surrounding the chip structure. A portion of the protective layer extends into the first redistribution layer and surrounds the bonding portion.
CHIP PACKAGE STRUCTURE WITH REDISTRIBUTION LAYER HAVING BONDING PORTION
A chip package structure is provided. The chip package structure includes a first redistribution layer having a first bonding portion and a chip structure bonded to the first bonding portion. A first width of the first bonding portion is substantially equal to a second width of the chip structure, and the chip structure includes a semiconductor substrate. The chip package structure also includes a second redistribution layer connected between the semiconductor substrate and the first bonding portion. The second redistribution layer has a second bonding portion and a first portion between the second bonding portion and the semiconductor substrate. The second bonding portion is connected to the first bonding portion. The first portion has a first sidewall and a second sidewall opposite to the first sidewall, and the second bonding portion is between the first sidewall and the second sidewall.