The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, a die and a first adhesive layer; a surface of the substrate is provided with an insulation layer; the die is arranged on a surface of the insulation layer via the first adhesive layer; the insulation layer is provided with at least one hole slot; a position of the at least one hole slot corresponds to at least a part of an edge of the first adhesive layer; a second adhesive layer is arranged in the at least one hole slot; at least a part of a surface of the second adhesive layer is connected with the first adhesive layer; and an elasticity modulus of the second adhesive layer is smaller than an elasticity modulus of the first adhesive layer.

The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, a die and a first adhesive layer; a surface of the substrate is provided with an insulation layer; the die is arranged on a surface of the insulation layer via the first adhesive layer; the insulation layer is provided with at least one slot; a position of the at least one slot corresponds to at least a part of an edge of the first adhesive layer; a second adhesive layer is arranged in the at least one slot; at least a part of a surface of the second adhesive layer is connected with the first adhesive layer; and an elasticity modulus of the second adhesive layer is smaller than an elasticity modulus of the first adhesive layer.

A method for producing a semiconductor arrangement includes applying a metallization layer on an upper main side of a lower semiconductor chip, structuring the metallization layer, and fastening an upper semiconductor chip on the upper main side of the lower semiconductor chip by a bonding material, wherein the metallization layer is structured such that the metallization layer has an increased roughness along a contour of the upper semiconductor chip in comparison with the rest of the metallization layer, wherein wetting of the upper main side of the lower semiconductor chip by the bonding material is limited by a structure in the metallization layer to a region below the upper semiconductor chip.

The present disclosure provides a coating method for suppressing variations in a coating amount, a coating apparatus and a method for manufacturing a component. A coating method is employed, which includes: discharging a coating needle adhering to an adhesive from a nozzle; separating the adhesive into the tip of the coating needle and the nozzle; and adhering the adhesive to a first member. A coating apparatus is employed, which includes: a nozzle which holds the adhesive; a coating needle which is discharged from the nozzle in a state where the adhesive is adhered to the tip; and a control unit which controls moving speed of the coating needle to separate the adhesive into the tip of the coating needle and the nozzle.

A method of manufacturing an electronic device is disclosed. An electronic unit is provided. The electronic unit has a chip and at least one bonding pin. The electronic unit is mounted on the substrate through the at least one bonding pin, and an adhesive material is applied to a space between the chip and the substrate.

A metal mask is disposed on a copper base plate. A solder paste is introduced into each of a plurality of openings in the metal mask, to thereby form a pattern of the solder paste on each of copper plates of the copper base plate. A semiconductor element and a conductive component are placed on the respective patterns of the solder pastes. A metal mask is disposed on the copper base plate. Then, a solder paste is introduced into each of a plurality of openings in the metal mask, to thereby form a pattern of the solder paste covering each of the semiconductor element and the conductive component. A large-capacity relay board is disposed so as to come into contact with a corresponding pattern of the solder paste. A power semiconductor device is completed by performing heat treatment under a temperature condition of 200° C. or higher.

A chip package structure is provided. The chip package structure includes a first redistribution layer having a bonding portion. The bonding portion includes a dielectric layer. The chip package structure includes a chip structure bonded to the bonding portion. A first width of the dielectric layer of the bonding portion is substantially equal to a second width of the chip structure. The chip package structure includes a protective layer over the first redistribution layer and surrounding the chip structure. A portion of the protective layer extends into the first redistribution layer and surrounds the bonding portion.

The present disclosure relates to micro-LED chips, methods for manufacturing the same, and display devices. The micro-LED chip includes: a driving backplane including at least one first electrode, a groove being provided above the first electrode, and the first electrode being located at a bottom of the groove; the groove being filled with a conductive material, and the conductive material being obtained by curing a corresponding conductive ink; and a light emitting chip including at least one second electrode; and the first electrode is connected to the second electrode through the conductive material.

The present disclosure provides a coating method for suppressing variations in a coating amount, a coating apparatus and a method for manufacturing a component. A coating method is employed, which includes: discharging a coating needle adhering to an adhesive from a nozzle; separating the adhesive into the tip of the coating needle and the nozzle; and adhering the adhesive to a first member. A coating apparatus is employed, which includes: a nozzle which holds the adhesive; a coating needle which is discharged from the nozzle in a state where the adhesive is adhered to the tip; and a control unit which controls moving speed of the coating needle to separate the adhesive into the tip of the coating needle and the nozzle.

Provided is an inkjet adhesive which is applied using an inkjet device, wherein the adhesive can suppress generation of voids in the adhesive layer and, after bonding, can enhance adhesiveness, moisture-resistant adhesion reliability, and cooling/heating cycle reliability. An inkjet adhesive according to the present invention comprises a photocurable compound, a photo-radical initiator, a thermosetting compound having one or more cyclic ether groups or cyclic thioether groups, and a compound capable of reacting with the thermosetting compound, and the compound capable of reacting with the thermosetting compound contains aromatic amine.