An application material container has a fixed portion and a container portion. The fixed portion is configured to be fixable to a fixing member included in an application mechanism. The container portion is provided with, in upper and lower portions thereof, a hole and a hole through which an application needle passes. A side surface of the container portion has a first flange. A lower surface of the first flange is in contact with an upper surface of the fixed portion. A gap is provided between a portion lower than the first flange on the side surface of the container portion and a side surface of the fixed portion. The container portion is horizontally movable within a range of the gap.

A semiconductor arrangement includes a lower semiconductor chip, an upper semiconductor chip arranged over an upper main side of the lower semiconductor chip, a metallization layer arranged on the upper main side of the lower semiconductor chip, and a bonding material which fastens the upper semiconductor chip on the lower semiconductor chip. The metallization layer includes a structure with increased roughness in comparison with the rest of the metallization layer, the structure being arranged along a contour of the upper semiconductor chip.

The present disclosure relates to micro-LED chips, methods for manufacturing the same, and display devices. The micro-LED chip includes: a driving backplane including at least one first electrode, a groove being provided above the first electrode, and the first electrode being located at a bottom of the groove; the groove being filled with a conductive material, and the conductive material being obtained by curing a corresponding conductive ink; and a light emitting chip including at least one second electrode; and the first electrode is connected to the second electrode through the conductive material.

A semiconductor package includes a package substrate, an image sensor disposed on the package substrate, and a bonding layer disposed between the package substrate and the image sensor, and including a first region and a second region, the second region has a modulus of elasticity lower than that of the first region and is disposed on a periphery of the first region.

A semiconductor package includes a package substrate, an image sensor disposed on the package substrate, and a bonding layer disposed between the package substrate and the image sensor, and including a first region and a second region, the second region has a modulus of elasticity lower than that of the first region and is disposed on a periphery of the first region.

The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a bump structure disposed on a first substrate and a molding compound in physical contact with the bump structure. The bump structure protrudes from the molding compound. A conductive region is on a second substrate and contacts the bump structure. A no-flow underfill (NUF) material is vertically between the molding compound and the second substrate and laterally surrounds the bump structure. The NUF material is separated from the molding compound.

The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a bump structure disposed on a first substrate and a molding compound in physical contact with the bump structure. The bump structure protrudes from the molding compound. A conductive region is on a second substrate and contacts the bump structure. A no-flow underfill (NUF) material is vertically between the molding compound and the second substrate and laterally surrounds the bump structure. The NUF material is separated from the molding compound.

A manufacturing method of a package structure is described. The method includes at least the following steps. A carrier is provided. A semiconductor die and a sacrificial structure are disposed on the carrier. The semiconductor die is electrically connected to the bonding pads on the sacrificial structure through a plurality of conductive wires. As encapsulant is formed on the carrier to encapsulate the semiconductor die, the sacrificial structure and the conductive wires. The carrier is debonded, and at least a portion of the sacrificial structure is removed through a thinning process. A redistribution layer is formed on the semiconductor die and the encapsulant. The redistribution layer is electrically connected to the semiconductor die through the conductive wires.

One aspect relates to a method for manufacturing a substrate assembly for attachment to an electronic component A substrate is provided with a first side and a second side. A contact material layer is applied to the first side of the substrate. A pre-fixing agent is applied at least to sections of a side of the contact material layer facing away from the substrate.

One aspect relates to a method for manufacturing a substrate assembly for attachment to an electronic component A substrate is provided with a first side and a second side. A contact material layer is applied to the first side of the substrate. A pre-fixing agent is applied at least to sections of a side of the contact material layer facing away from the substrate.