A method includes forming a metal seed layer on a dielectric layer, and forming a patterned mask over the metal seed layer. An opening in the patterned mask is over a first portion of the dielectric layer, and the patterned mask overlaps a second portion of the dielectric layer. The method further includes plating a metal region in the opening, removing the patterned mask to expose portions of the metal seed layer, etching the exposed portions of the metal seed layer, performing a plasma treatment on a surface of the second portion of the dielectric layer, and performing an etching process on the surface of the second portion of the dielectric layer.

The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a substrate, a first electronic component, an interlayer, a third electronic component and an encapsulant. The first electronic component is disposed on the substrate. The first electronic component has an upper surface and a lateral surface and a first edge between the upper surface and the lateral surface. The interlayer is on the upper surface of the first electronic component. The third electronic component is attached to the upper surface of the first electronic component via the interlayer. The encapsulant encapsulates the first electronic component and the interlayer. The interlayer does not contact the lateral surface of the first electronic component.

The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a substrate, a first electronic component, an interlayer, a third electronic component and an encapsulant. The first electronic component is disposed on the substrate. The first electronic component has an upper surface and a lateral surface and a first edge between the upper surface and the lateral surface. The interlayer is on the upper surface of the first electronic component. The third electronic component is attached to the upper surface of the first electronic component via the interlayer. The encapsulant encapsulates the first electronic component and the interlayer. The interlayer does not contact the lateral surface of the first electronic component.

A method of and system for adhesive bonding by a) providing a polymerizable adhesive composition on a surface of an element to be bonded to form an assembly; b) irradiating the assembly with radiation at a first wavelength capable of vulcanization of bonds in the polymerizable adhesive composition by activation of sulfur-containing compound with at least one selected from x-ray, e-beam, visible, or infrared light to thereby generate ultraviolet light in the polymerizable adhesive composition; and c) adhesively joining two or more components together by way of the polymerizable adhesive composition, and a curable polymer for use therein.

A method of and system for adhesive bonding by a) providing a polymerizable adhesive composition on a surface of an element to be bonded to form an assembly; b) irradiating the assembly with radiation at a first wavelength capable of vulcanization of bonds in the polymerizable adhesive composition by activation of sulfur-containing compound with at least one selected from x-ray, e-beam, visible, or infrared light to thereby generate ultraviolet light in the polymerizable adhesive composition; and c) adhesively joining two or more components together by way of the polymerizable adhesive composition, and a curable polymer for use therein.

In a method of manufacturing a semiconductor package, information with respect to a downward warpage of a reference package substrate, which may be bent with respect to a long axis and/or a short axis of the reference package substrate in applying heat to the reference package substrate to which a plurality of semiconductor chips may be attached using a die attach film (DAF), may be obtained. A package substrate, which may include a first surface to which the semiconductor chips may be attached using the DAF and a second surface opposite to the first surface, may be rotated with respect to the long axis or the short axis at an angle selected based on the information. The heat may be applied to the package substrate to cure the DAF and correct a warpage of the package substrate. Thus, warpage of the package substrate may be corrected for.

In a method of manufacturing a semiconductor package, information with respect to a downward warpage of a reference package substrate, which may be bent with respect to a long axis and/or a short axis of the reference package substrate in applying heat to the reference package substrate to which a plurality of semiconductor chips may be attached using a die attach film (DAF), may be obtained. A package substrate, which may include a first surface to which the semiconductor chips may be attached using the DAF and a second surface opposite to the first surface, may be rotated with respect to the long axis or the short axis at an angle selected based on the information. The heat may be applied to the package substrate to cure the DAF and correct a warpage of the package substrate. Thus, warpage of the package substrate may be corrected for.

A composition exhibits excellent heat resistance and mounting reliability when bonding a semiconductor power element to a metal lead frame, which is also free of lead and thereby places little burden on the environment. An electrically conductive composition contains at least a sulfide compound represented by R—S—R′ (wherein R is an organic group containing at least carbon; R′ is an organic group that is the same as or different from R; and R and R′ may be bonded to each other to form a so-called cyclic sulfide) and metal particles containing at least Cu, Sn or Ni as its essential component. Further, a conductive paste and a conductive bonding film each are produced using the electrically conductive composition. A dicing die bonding film is obtained by bonding the conductive bonding film with an adhesive tape.

The purpose of the present invention is to provide an adhesive composition which allows an alignment mark to be recognized, ensures sufficient solder wettability of a joining section, and is excellent in suppression of void generation. The adhesive composition includes: a high-molecular compound (A); an epoxy compound (B) having a weight average molecular weight of 100 or more and 3,000 or less; and a flux (C); and inorganic particles (D) which have on the surfaces thereof an alkoxysilane having a phenyl group and which have an average, particle diameter of 30 to 200 nm, the flux (C) containing an acid-modified rosin.

The purpose of the present invention is to provide an adhesive composition which allows an alignment mark to be recognized, ensures sufficient solder wettability of a joining section, and is excellent in suppression of void generation. The adhesive composition includes: a high-molecular compound (A); an epoxy compound (B) having a weight average molecular weight of 100 or more and 3,000 or less; and a flux (C); and inorganic particles (D) which have on the surfaces thereof an alkoxysilane having a phenyl group and which have an average, particle diameter of 30 to 200 nm, the flux (C) containing an acid-modified rosin.