H01L2224/27622

Chip carrier and method thereof
10163820 · 2018-12-25 · ·

A method may include providing a chip carrier having a chip supporting region to support a chip, and a chip contacting region having at least one contact pad, the chip carrier being thinner in the chip contacting region such that a first thickness of the chip carrier at the at least one contact pad is smaller than a second thickness of the chip carrier in the chip supporting region. A disposing of the chip, having at least one contact protrusion, over the chip carrier, such that the at least one contact protrusion is arranged over the at least one contact pad may be included. In addition, a pressing of the chip against the chip carrier such that the at least one contact protrusion extends at least partially into the chip contacting region and is electrically contacted to the at least one contact pad may be included.

Chip carrier and method thereof
10163820 · 2018-12-25 · ·

A method may include providing a chip carrier having a chip supporting region to support a chip, and a chip contacting region having at least one contact pad, the chip carrier being thinner in the chip contacting region such that a first thickness of the chip carrier at the at least one contact pad is smaller than a second thickness of the chip carrier in the chip supporting region. A disposing of the chip, having at least one contact protrusion, over the chip carrier, such that the at least one contact protrusion is arranged over the at least one contact pad may be included. In addition, a pressing of the chip against the chip carrier such that the at least one contact protrusion extends at least partially into the chip contacting region and is electrically contacted to the at least one contact pad may be included.

Dam for Three-Dimensional Integrated Circuit

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

Dam for Three-Dimensional Integrated Circuit

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE USING WET ETCHING AND DRY ETCHING AND SEMICONDUCTOR DEVICE

A semiconductor device includes a semiconductor substrate, a TiW layer arranged on the semiconductor substrate a Ti layer arranged on the TiW layer, a Ni alloy layer arranged on the Ti layer, and an Ag layer arranged on the Ni alloy layer, wherein the Ag layer and the Ni alloy layer comprise side faces fabricated by at least one wet etching process, and wherein the Ti layer and the TiW layer comprise side faces fabricated by a dry etching process.

FINGERPRINT SENSOR AND MANUFACTURING METHOD THEREOF
20240304577 · 2024-09-12 ·

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

FINGERPRINT SENSOR AND MANUFACTURING METHOD THEREOF
20240304577 · 2024-09-12 ·

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

INTEGRATED-CIRCUIT MODULE COLLECTION AND DEPOSITION

A module collection and deposition system comprises a container, a module source wafer comprising modules released from the module source wafer, a module collection device operable to remove the modules from the module source wafer and dispose the modules as a disordered and dry collection into the container, and a module deposition device for removing the modules from the container and randomly disposing the modules on a receiving surface. Each module comprises an electronically active unpackaged component.

INTEGRATED-CIRCUIT MODULE COLLECTION AND DEPOSITION

A module collection and deposition system comprises a container, a module source wafer comprising modules released from the module source wafer, a module collection device operable to remove the modules from the module source wafer and dispose the modules as a disordered and dry collection into the container, and a module deposition device for removing the modules from the container and randomly disposing the modules on a receiving surface. Each module comprises an electronically active unpackaged component.

Dam for three-dimensional integrated circuit

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.