Processes for adjusting dimensions of dielectric bond line materials in stacks of microelectronic components, and related material films, articles and assemblies.

Processes for adjusting dimensions of dielectric bond line materials in stacks of microelectronic components, and related material films, articles and assemblies.

Provided is a printed circuit board using thermally and electrically conductive layer, and a manufacturing method thereof. The manufacturing method for mounting a plurality of elements includes forming an electrode layer on a substrate of a PCB, forming a photo solder resist (PSR) layer in a patterned manner on a first area of the electrode layer; forming a conductive layer on the PSR layer in the patterned manner, the conductive layer being configured to conduct heat and static electricity; and mounting a plurality of elements on a second area of the side of the PCB, the second area being different from the first area.

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

A method of making a secure integrated-circuit system comprises providing a first integrated circuit in a first die having a first die size and providing a second integrated circuit in a second die. The second die size is smaller than the first die size. The second die is transfer printed onto the first die and connected to the first integrated circuit, forming a compound die. The compound die is packaged. The second integrated circuit is operable to monitor the operation of the first integrated circuit and provides a monitor signal responsive to the operation of the first integrated circuit. The first integrated circuit can be constructed in an insecure facility and the second integrated circuit can be constructed in a secure facility.

A method of making a secure integrated-circuit system comprises providing a first integrated circuit in a first die having a first die size and providing a second integrated circuit in a second die. The second die size is smaller than the first die size. The second die is transfer printed onto the first die and connected to the first integrated circuit, forming a compound die. The compound die is packaged. The second integrated circuit is operable to monitor the operation of the first integrated circuit and provides a monitor signal responsive to the operation of the first integrated circuit. The first integrated circuit can be constructed in an insecure facility and the second integrated circuit can be constructed in a secure facility.

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

A method of and system for adhesive bonding by a) providing a polymerizable adhesive composition on a surface of an element to be bonded to form an assembly; b) irradiating the assembly with radiation at a first wavelength capable of vulcanization of bonds in the polymerizable adhesive composition by activation of sulfur-containing compound with at least one selected from x-ray, e-beam, visible, or infrared light to thereby generate ultraviolet light in the polymerizable adhesive composition; and c) adhesively joining two or more components together by way of the polymerizable adhesive composition, and a curable polymer for use therein.