An adhesive with self-connecting interconnects is provided. The adhesive layer provides automatic 3D joining of microelectronic components with a conductively self-adjusting anisotropic matrix. In an implementation, the adhesive matrix automatically makes electrical connections between two surfaces that have opposing electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

3D joining of microelectronic components and a conductively self-adjusting anisotropic matrix are provided. In an implementation, an adhesive matrix automatically makes electrical connections between two surfaces that have electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

A power electronic package includes a first substrate, a second substrate oppositely disposed from the first substrate, one or more chips disposed between the substrates, and at least three spacers. The spacers control a height variation of the power electronic package and protect the chips and other electronics from experiencing excessive stress. The height of the spacers is determined based on a height of the chips, on a height of solder blocks that connect the chips to the top substrate, and on a height of solder blocks that connect the chips to the bottom substrate.

A method of manufacturing a semiconductor device which includes a first member and a second member joined to the first member includes: a) producing (Cu,Ni).sub.6Sn.sub.5 on a Ni film formed on the first member by melting a first SnCu solder containing 0.9 wt % or higher of Cu on the Ni film of the first member; b) producing (Cu,Ni).sub.6Sn.sub.5 on a Ni film formed on the second member by melting a second SnCu solder containing 0.9 wt % or higher of Cu on the Ni film of the second member; and c) joining the first member and the second member to each other by melting the first SnCu solder having undergone step a) and the second SnCu solder having undergone step b) so that the first SnCu solder and the second SnCu solder become integrated.

A solder paste consists of an amount of a first solder alloy powder between 44 wt % to less than 60 wt %; an amount of a second solder alloy powder between greater than 0 wt % and 48 wt %; and a flux; wherein the first solder alloy powder comprises a first solder alloy that has a solidus temperature above 260 C.; and wherein the second solder alloy powder comprises a second solder alloy that has a solidus temperature that is less than 250 C. In another implementation, the solder paste consists of an amount of a first solder alloy powder between 44 wt % and 87 wt %; an amount of a second solder alloy powder between 13 wt % and 48 wt %; and flux.

A solder paste consists of an amount of a first solder alloy powder between 44 wt % to less than 60 wt %; an amount of a second solder alloy powder between greater than 0 wt % and 48 wt %; and a flux; wherein the first solder alloy powder comprises a first solder alloy that has a solidus temperature above 260 C.; and wherein the second solder alloy powder comprises a second solder alloy that has a solidus temperature that is less than 250 C. In another implementation, the solder paste consists of an amount of a first solder alloy powder between 44 wt % and 87 wt %; an amount of a second solder alloy powder between 13 wt % and 48 wt %; and flux.

A solder paste includes a flux and powder mixed with the flux, where the powder includes first powder and second powder mixed with each other. The first powder may be a tin (Sn) and at least one metal dissolved in the tin (Sn), and the second powder may be a copper (Cu) powder, the surface of which is coated with silver (Ag).

3D joining of microelectronic components and a conductively self-adjusting anisotropic matrix are provided. In an implementation, an adhesive matrix automatically makes electrical connections between two surfaces that have electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

An electronic component includes an integrated circuit chip and a package surrounding the integrated circuit chip. The electronic component includes at least a first conductive region at least partially coating one side of the integrated circuit chip. The first conductive region includes an alloy predominantly comprising bismuth.

A method of bonding a plurality of die having first and second metal layers on a die surface to a board, comprising placing a first die onto a board comprising one of a ceramic or substrate board or metal lead frame having a solderable surface and placing the first die and the board into a reflow oven. The method includes reflowing at a first reflow temperature for a first period until the first metal board layer and at least one of the first and second metal die layers of the first die form an alloy to adhere the first die to the board. The alloy has a melting temperature higher than the first reflow temperature. Accordingly, additional die may be added at a later time and reflowed to attach to the board without causing the bonding of the first die to the board to fail.