There is provided a semiconductor chip having four sides and being substantially formed in a rectangle, the semiconductor chip including: a first terminal which is located along one side of the four sides of the semiconductor chip and which is to be electrically connected to a solar cell outside the semiconductor chip; a second terminal which is located along the one side of the semiconductor chip and which is to be electrically connected to a secondary cell outside the semiconductor chip; and an interconnection line that electrically interconnects the first terminal and the second terminal.

There is provided a semiconductor chip having four sides and being substantially formed in a rectangle, the semiconductor chip including: a first terminal which is located along one side of the four sides of the semiconductor chip and which is to be electrically connected to a solar cell outside the semiconductor chip; a second terminal which is located along the one side of the semiconductor chip and which is to be electrically connected to a secondary cell outside the semiconductor chip; and an interconnection line that electrically interconnects the first terminal and the second terminal.

There is provided a semiconductor chip having four sides and being substantially formed in a rectangle, the semiconductor chip including: a first terminal which is located along one side of the four sides of the semiconductor chip and which is to be electrically connected to a solar cell outside the semiconductor chip; a second terminal which is located along the one side of the semiconductor chip and which is to be electrically connected to a secondary cell outside the semiconductor chip; and an interconnection line that electrically interconnects the first terminal and the second terminal.

There is provided a semiconductor chip having four sides and being substantially formed in a rectangle, the semiconductor chip including: a first terminal which is located along one side of the four sides of the semiconductor chip and which is to be electrically connected to a solar cell outside the semiconductor chip; a second terminal which is located along the one side of the semiconductor chip and which is to be electrically connected to a secondary cell outside the semiconductor chip; and an interconnection line that electrically interconnects the first terminal and the second terminal.

A trench (20) is introduced into a carrier (10) for electrical components (30) on a first surface (O10a) of the carrier into the material of the carrier (10). The carrier (10) is cut through by a cut (60) being introduced into the material of the carrier from a second surface (O10b) of the carrier (10), said second surface being situated opposite the first surface. The cut is implemented in such a way that the cut (60) runs through the trench (20) on the first surface (O10a) of the carrier. By providing a trench (20) in the material layers of the carrier (10) which are near the surface, it is possible to prevent material from breaking out of the carrier during the singulation of devices (1, 2).

A trench (20) is introduced into a carrier (10) for electrical components (30) on a first surface (O10a) of the carrier into the material of the carrier (10). The carrier (10) is cut through by a cut (60) being introduced into the material of the carrier from a second surface (O10b) of the carrier (10), said second surface being situated opposite the first surface. The cut is implemented in such a way that the cut (60) runs through the trench (20) on the first surface (O10a) of the carrier. By providing a trench (20) in the material layers of the carrier (10) which are near the surface, it is possible to prevent material from breaking out of the carrier during the singulation of devices (1, 2).

An electronic component includes a base insulative layer having first and second surfaces; an electronic device having first and second surfaces; at least one I/O contact located on the first surface of the electronic device; an adhesive layer disposed between the first surface of the electronic device and the second surface of the base insulative layer; a first metal layer disposed on the I/O contact; and a removable layer disposed between the first surface of the electronic device and the second surface of the base insulative layer, and located adjacent to the first metal layer. The base insulative layer secures to the electronic device through the first metal layer and removable layer. The first metal layer and removable layer can release the base insulative layer from the electronic device when the first metal layer and removable layer are exposed to a temperature higher than their softening points or melting points.

An electronic component includes a base insulative layer having first and second surfaces; an electronic device having first and second surfaces; at least one I/O contact located on the first surface of the electronic device; an adhesive layer disposed between the first surface of the electronic device and the second surface of the base insulative layer; a first metal layer disposed on the I/O contact; and a removable layer disposed between the first surface of the electronic device and the second surface of the base insulative layer, and located adjacent to the first metal layer. The base insulative layer secures to the electronic device through the first metal layer and removable layer. The first metal layer and removable layer can release the base insulative layer from the electronic device when the first metal layer and removable layer are exposed to a temperature higher than their softening points or melting points.

A sensor device includes a semiconductor sensor element and a substrate on which the semiconductor sensor element is mounted. The substrate includes a sensor-element mounted portion at which the semiconductor sensor element is mounted, and includes a first resist portion that surrounds the sensor-element mounted portion. The substrate includes a first region adjacent to the first resist portion and being covered with a resin layer, and includes a second resist portion that surrounds the first resist portion, the first region being interposed between the first resist portion and the second resist portion. The substrate includes at least one third resist portion extending from the first resist portion toward the second resist portion.

A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes a semiconductor substrate including an active region defined by a device isolation film, a bit line contact plug that is coupled to the active region and that includes a first ion implantation region buried in a first inner void, and a storage node contact plug that is coupled to the active region and includes a second ion implantation region buried in a second inner void. Although the semiconductor device is highly integrated, a contact plug is buried to prevent formation of a void, so that increase in contact plug resistance is prevented, resulting in improved semiconductor device characteristics.