Patent classifications
H01L2224/37005
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
In a first step of a method of manufacturing a semiconductor device, a portion to be the first lead frame is formed by selectively punching a metal plate, furthermore, notch portions depressed in the reference direction are formed on both side surfaces of a portion, of the first lead frame where the first bent portion is formed, in line contact with the first conductive layer in the reference direction; in the second step of the method, a first bent portion is formed by bending the one end of the first lead frame so as to protrude downward along the reference direction; and in the third step of the method, the upper surface of the first conductive layer and the lower surface of the first bent portion of the first lead frame are joined at the end of the substrate, by the first conductive bonding material, furthermore, the upper surface of the first conductive layer and the notch portions of the first bent portion are joined, by embedding a part of the first conductive bonding material in the notch portions.
POWER SUBSTRATE ASSEMBLY WITH REDUCED WARPAGE
A substrate assembly may include a power substrate, a chip, a clip, and a trimetal. The power substrate has a first direct copper bonded (DCB) surface connected to a ceramic tile. The chip is soldered onto the first DCB surface. The clip is attached to the power substrate and has a foot at one end and a recessed area at the other, opposite end. The foot is connected to the power substrate. The trimetal has a base, a trapezoid structure, and a clip portion. The base is soldered to the chip. The trapezoid structure is located above the base. The clip portion is located above the trapezoid structure and includes a projecting area. The recessed area of the clip fits into the projecting area of the trimetal.
SEMICONDUCTOR DEVICE
A semiconductor device according to an embodiment includes a metal frame separated from a semiconductor chip, and a metal connector connected to the semiconductor chip via a first bonding material on an electrode of the semiconductor chip, and connected to the metal frame via a second bonding material on a disposition surface of the metal frame. The metal connector includes: a first part connected to the first bonding material and serving as a first end; a second part connected to the first part and rising toward the metal frame; a third part connected to the second part and serving as a second end; and a notch that opens on a second-end-side surface formed on the third part, adjacent to a connecting surface connected to the second bonding material, and opposed to a tilted surface of the metal frame adjacent to and tilted with respect to the disposition surface.
SEMICONDUCTOR MODULE
A semiconductor module includes a first semiconductor chip including a first main electrode, a second semiconductor chip including a second main electrode, and a conductive pattern. The wiring member includes a connection portion, a first portion, a second portion, and a coupling portion. The coupling portion couples the connection portion, the first portion, and the second portion to one another. A connecting protrusion is formed on a connection surface of the connection portion. A first protrusion is formed on a first connection surface of the first portion. A second protrusion is formed on a second connection surface of the first portion. The conductive pattern and the connection surface are joined to each other by a joining material. The first main electrode and the first connection surface are joined to each other by a first joining material. The second main electrode and the second connection surface are joined to each other by a second joining material.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device. A semiconductor device is implemented as a semiconductor module package for driving an inverter, the semiconductor device may include: a first upper metal layer in which a plurality of semiconductor chips implementing a right phase switching pattern are disposed along a first direction to form a first row; a second upper metal layer in which a plurality of semiconductor chips implementing a left phase switching pattern are disposed along the first direction to form a second row; a first connection, in the first upper metal layer, connecting a plurality of semiconductor chips disposed along the first row to each other in series and to the second upper metal layer in parallel; and a second connection, in the second upper metal layer, connecting a plurality of semiconductor chips disposed along the second row to each other in series.
Flexible integrated heat spreader
A thermal management solution may be provided for a microelectronic system including a flexible integrated heat spreader, wherein the flexible integrated heat spreader may comprise a plurality of thermally conductive structures having a flexible thermally conductive film attached to and extending between each of the plurality of thermally conductive structures. The flexible integrated heat spreader may be incorporated into multi-chip package by providing a microelectronic substrate having a plurality of microelectronic devices attached thereto and by thermally contacting each of the plurality of thermally conductive structures of the flexible integrated heat spreader to its respective microelectronic device on the microelectronic substrate.
Semiconductor device and production method for semiconductor device
A semiconductor device includes a semiconductor element (30), an input lead, and first drive leads (60) connecting a source electrode of the semiconductor element (30) to the input lead. The first drive leads (60) are formed of a thin metal plate that is belt-shaped as viewed in a thickness-wise direction (Z). The first drive leads (60) include at least a metal plate (60A) connected to the semiconductor element (60) and a metal plate (60B) stacked on the metal plate (60A). The metal plate (60A) includes a first connector (61A) connected to the semiconductor element (30). The metal plate (60B) includes a first connector (61B) connected to the first connector (61A). The first connectors (61A, 61B) are stacked in the thickness-wise direction (Z).
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND POWER CONVERSION DEVICE
Provided is a semiconductor device having a structure of directly bonding a lead electrode to a semiconductor element through a bonding layer, in which whether the bonding layer has a predetermined thickness can be checked through a visual inspection. The semiconductor device includes: a semiconductor element mounted on an insulating substrate or a lead frame; a bonding layer on the semiconductor element; and a lead electrode including a main body plate electrically connected to an external electrode, and a cantilevered plate having one end being connected to the main body plate as a connection part, and being cut from the main body plate, wherein the cantilevered plate is bent in a direction of the semiconductor element with respect to the main body plate, and has an other end embedded in the bonding layer, and the bonding layer covers at least a part of an upper surface of the cantilevered plate.
CHIP PACKAGE MODULE, METHOD FOR MANUFACTURING SAME, POWER MODULE, AND ELECTRONIC DEVICE
A chip package module, including a first conductive frame, a first bare die disposed on the first conductive frame, and a second conductive frame disposed at an interval beside the first conductive frame. The chip package module further includes a first conductive connecting sheet, a second bare die, and a conductive cover plate. The first conductive connecting sheet is connected to a surface of the first bare die away from the first conductive frame, and extends to be lapped on the second conductive frame. The second bare die is laminated on the first bare die and is connected to the first conductive connecting sheet. The conductive cover plate is connected to a surface of the second bare die away from the first conductive frame and extends to be connected to the first conductive frame.
METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE ASSEMBLY AS WELL AS A SEMICONDUCTOR PACKAGE ASSEMBLY OBTAINED WITH THIS METHOD
The present disclosure relates to techniques for manufacturing a semiconductor package assembly, with a semiconductor die structure mounted to a lead frame having terminals and encapsulated with a molding resin, as well as a semiconductor package assembly obtained with these techniques. An object of the present disclosure is to provide a manufacturing technique that results in a leaded/leadless power/MCD package or power module manufactured with less complex and less time-consuming process steps, and the connecting elements being implemented are of a straightforward design with reduced R.sub.DS(on) characteristic.