A power module includes an insulating substrate, a heat dissipation member, and an electrode plate. An IGBT and a diode are mounted on the insulating substrate. The heat dissipation member is bonded to the insulating substrate by first solder. The electrode plate is disposed so as to overlap at least a part of the semiconductor element. The main surface of the insulating substrate is curved so as to have a shape convex toward the heat dissipation member. The first solder is thicker at the edges than at the center in a plan view. The semiconductor element is bonded to the electrode plate by second solder.

An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

In a semiconductor device according to the present disclosure, one end and the other end of a plurality of insulation covering wires are joined to a connection region in an upper electrode of a DBC substrate over a semiconductor element while an insulation covering portion in a center region has contact with a surface of the semiconductor element. The plurality of insulation covering wires are provided along an X direction in the same manner as the plurality of metal wires. The plurality of insulation covering wires are provided with no loosening, thus have press force of pressing the semiconductor element in a direction of the solder joint portion.

A temporary protective film for semiconductor encapsulation molding, the temporary protective film including a support film, an adhesive layer provided on one surface of the support film, and a non-adhesive layer provided on a surface of the support film on an opposite side from the surface provided with the adhesive layer. The thickness of the non-adhesive layer is 10 μm or less. A surface of the non-adhesive layer on an opposite side of a surface in contact with the support film, has a surface roughness Ra of 0.1 μm or more.

A temporary protective film for semiconductor encapsulation molding, the temporary protective film including a support film, an adhesive layer provided on one surface of the support film, and a non-adhesive layer provided on a surface of the support film on an opposite side from the surface provided with the adhesive layer. The thickness of the non-adhesive layer is 10 μm or less. A surface of the non-adhesive layer on an opposite side of a surface in contact with the support film, has a surface roughness Ra of 0.1 μm or more.

There is provided a bonding wire for semiconductor devices that exhibits a favorable bondability even when being applied to wedge bonding at the room temperature, and also achieves an excellent bond reliability. The bonding wire includes a core material of Cu or Cu alloy (hereinafter referred to as a “Cu core material”), and a coating containing a noble metal formed on a surface of the Cu core material. A concentration of Cu at a surface of the wire is 30 to 80 at%.

The present invention provides a bonding wire capable of simultaneously satisfying ball bonding reliability and wedge bondability required of bonding wires for memories, the bonding wire including a core material containing one or more of Ga, In, and Sn for a total of 0.1 to 3.0 at % with a balance being made up of Ag and incidental impurities; and a coating layer formed over a surface of the core material, containing one or more of Pd and Pt, or Ag and one or more of Pd and Pt, with a balance being made up of incidental impurities, wherein the coating layer is 0.005 to 0.070 μm in thickness.

The present invention provides a bonding wire capable of simultaneously satisfying ball bonding reliability and wedge bondability required of bonding wires for memories, the bonding wire including a core material containing one or more of Ga, In, and Sn for a total of 0.1 to 3.0 at % with a balance being made up of Ag and incidental impurities; and a coating layer formed over a surface of the core material, containing one or more of Pd and Pt, or Ag and one or more of Pd and Pt, with a balance being made up of incidental impurities, wherein the coating layer is 0.005 to 0.070 μm in thickness.