A semiconductor module, including a semiconductor chip, a sealed main body portion sealing the semiconductor chip and having a pair of attachment holes penetrating therethrough, a heat dissipation plate in contact with the sealed main body portion. The heat dissipation plate is positioned between the attachment holes in a plan view of the semiconductor module. The semiconductor module further includes a pair of rear surface supporting portions and/or a pair of front surface supporting portions protruding respectively from rear and front surfaces of the sealed main body portion. In the plan view, the heat dissipation plate is formed between the pair of attachment holes, which are in turn between the pair of rear surface supporting portions. The pair of front surface supporting portions are formed substantially between the pair of attachment holes in the plan view.

Described is a packaged component having a first surface and an opposite second surface. The packaged component may comprise a first element a second element, and a third element. The first element may have a first surface and an opposite second surface. The second element may have a first surface and an opposite second surface. The third element may electrically connect a portion of the first element to a portion of the second element. The second surface of the first element may be adjacent to the second surface of the packaged component, and the second surface of the second element may be adjacent to the second surface of the packaged component.

A power module is provided with a substrate, power devices, and a housing. The power devices are mounted on device pads of the substrate and arranged to provide a power circuit having a first input, a second input, and at least one output. First and second power terminals provide first and second inputs for the power circuit. At least one output power terminal provides at least one output. The housing encompasses the substrate, the power devices, and portions of the first and second input power terminals as well as the at least one output power terminal. The first and second input power terminals extend out of a first side of the housing, and the at least one output power terminal extends out of a second side of the housing, the first side being opposite the second side.

A semiconductor device includes a semiconductor chip, a substrate having a main surface on which the semiconductor chip is arranged, a resin case which has a storage space therein and a side wall, the side wall having an injection path extending from the storage space to a device exterior, the resin case having a first opening at a bottom side thereof, connecting the storage space to the device exterior, the substrate being disposed on the resin case, at a main surface side of the substrate facing at the bottom side of the resin case, and a sealing material filling the storage space and the injection path.

A semiconductor device has a substrate. A plurality of conductive vias is formed through the substrate. A conductive layer is formed over the substrate. An insulating layer is formed over conductive layer. A portion of the substrate is removed to expose the conductive vias. A plurality of vertical interconnect structures is formed over the substrate. A first semiconductor die is disposed over the substrate. A height of the vertical interconnect structures is less than a height of the first semiconductor die. An encapsulant is deposited over the first semiconductor die and the vertical interconnect structures. A first portion of the encapsulant is removed from over the first semiconductor die while leaving a second portion of the encapsulant over the vertical interconnect structures. The second portion of the encapsulant is removed to expose the vertical interconnect structures. A second semiconductor die is disposed over the first semiconductor die.

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise an interconnection structure, for example a bond wire, at least a portion of which extends into a dielectric layer utilized to mount a plate, and/or that comprise an interconnection structure that extends upward from the semiconductor die at a location that is laterally offset from the plate.

A semiconductor module includes: a semiconductor element; a laminated substrate including a circuit substrate on which the semiconductor element is mounted; a case including a plurality of terminal holes, the case housing the semiconductor element; a plurality of external terminals, each external terminal being inserted into one of two or more terminal holes among the plurality of terminal holes, the plurality of external terminals being electrically connected to the semiconductor element; and a spacer interposed between the laminated substrate and the case. The case and the spacer are bonded to each other by an adhesive. The case includes, for each two adjacent terminal holes among the plurality of terminal holes, a partition between the two adjacent terminal holes. A distance between the first bonding surface and the partition is greater than a thickness of each external terminal.

Disclosed is a semiconductor package comprising a package substrate having a mount region and a peripheral region that surrounds the mount region, a semiconductor device on the mount region of the package substrate, a package cap on the peripheral region of the package substrate and including a partition portion that surrounds the semiconductor device and an extension portion that covers the semiconductor device, and an adhesive layer between the package substrate and a bottom surface of the package cap. The bottom surface of the package cap has a trench. The trench has a trapezoidal cross-section whose width decreases in a direction receding from the bottom surface of the package cap. The adhesive layer is in contact with a top surface of the package substrate and the bottom surface of the package cap. The adhesive layer fills the trench.

A semiconductor device includes a semiconductor element, a die pad, an encapsulating member, and a plurality of leads. The die pad has a front surface on which the semiconductor element is mounted. The encapsulating member covers and seals the semiconductor element. The plurality of leads each have a first end connected to the semiconductor element in an inside of the encapsulating member and a second end led out from a side surface of the encapsulating member. A lower surface of a package including the semiconductor element, the die pad, and the encapsulating member is located on a back surface side of the die pad and has a convexly curved shape.

CTE compensation for wafer-level and chip-scale packages and assemblies.