An object is to provide a semiconductor device capable of accurately detecting a temperature of a transistor part and a temperature of the diode part, and improving an overheat protection function. A semiconductor device includes a semiconductor chip having a cell region made up of a plurality of cells including cells corresponding to a transistor part and a diode part, respectively, a temperature detection part detecting a temperature of the transistor part, and a temperature detection part detecting a temperature of the diode part, the temperature detection part is disposed in the cell corresponding to the transistor part, and the temperature detection part is disposed in the cell corresponding to the diode part.

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, amounting layer, switching elements, a moisture-resistant layer and a sealing resin. The substrate has a front surface facing in a thickness direction. The mounting layer is electrically conductive and disposed on the front surface. Each switching element includes an element front surface facing in the same direction in which the front surface faces along the thickness direction, a back surface facing in the opposite direction of the element front surface, and a side surface connected to the element front surface and the back surface. The switching elements are electrically bonded to the mounting layer with their back surfaces facing the front surface. The moisture-resistant layer covers at least one side surface. The sealing resin covers the switching elements and the moisture-resistant layer. The moisture-resistant layer is held in contact with the mounting layer and the side surface so as to be spanned between the mounting layer and the side surface in the thickness direction.

In a method for increasing the electrical functionality, and/or service life, of power electronic modules, the power electronic circuit carrier, and/or the metallisation applied onto the power electronic circuit carrier, and/or a base plate connected, or to be connected, to a rear face of the power electronic circuit carrier, is finely structured by means of local material removal with at least one laser beam, so as to reduce thermomechanical stresses occurring during the production or operation of the module. In an alternative form of embodiment, the metallisation applied onto the front face of the power electronic circuit carrier is structured, or an already created structure is refined or supplemented, by means of local material removal with laser radiation, so as to achieve a prescribed electrical functionality of the metallisation.

A semiconductor device includes a semiconductor element, a lead frame, a conductive member, a resin composition and a sealing resin. The semiconductor element has an element front surface and an element back surface facing away in a first direction. The semiconductor element is mounted on the lead frame. The conductive member is bonded to the lead frame, electrically connecting the semiconductor element and the lead frame. The resin composition covers a bonded region where the conductive member and lead frame are bonded while exposing part of the element front surface. The sealing resin covers part of the lead frame, the semiconductor element, and the resin composition. The resin composition has a greater bonding strength with the lead frame than a bonding strength between the sealing resin and lead frame and a greater bonding strength with the conductive member than a bonding strength between the sealing resin and conductive member.

A semiconductor arrangement includes a controllable semiconductor element having an active region, and bonding wires arranged in parallel to each other in a first horizontal direction. The active region has a first length in the first horizontal direction and a first width in a second horizontal direction perpendicular to the first horizontal direction. Each bonding wire is electrically and mechanically coupled to the controllable semiconductor element by a first number of bond connections arranged above the active region. A first bond connection of each bonding wire is arranged at a first distance from a first edge of the active region. A second bond connection of each bonding wire is arranged at a second distance from a second edge of the active region opposite the first edge. The first and second distances are both less than the first length divided by twice the first number of bond connections.

A bonding wire for connecting a first pad to a second pad is provided. The bonding wire includes a ball part bonded to the first pad, a neck part formed on the ball part, and a wire part extending from the neck part to the second pad. Less than an entire portion of a top surface of the neck part is covered by the wire part, and the wire part is in contact with the neck part, the ball part, and the first pad.

An object of the present disclosure is to suppress a shrinkage cavity without affecting the layout or the insulation performance of the semiconductor element in a power semiconductor device. A power semiconductor device includes a heat radiation plate; an insulating substrate bonded in a bonding region on an upper surface of the heat radiation plate with a bonding material containing a plurality of elements having different solidification points; a semiconductor element mounted on an upper surface of the insulating substrate; and a bonding wire bonded in the bonding region on the upper surface of the heat radiation plate such that the bonding wire surrounds the semiconductor element in plan view.

A power electronics assembly is provided with a self-healing feature. The power electronics assembly may include a semiconductor electronics device and an insulating substrate coupled to the semiconductor electronics device. A base metal structural component may be provided, coupled to the insulating substrate. The assembly may include a frame component cooperating with the base metal structural component and defining an enclosure containing the semiconductor electronics device and the insulating substrate. The assembly further includes a self-healing polymer comprising disulfide bonds. The self-healing polymer is disposed within the enclosure; additional potting material may also be provided as a multi-layered encapsulation. In various aspects, the self-healing polymer may include polydimethylsiloxane based polyurethane (PDMS-PU) modified with disulfide bonds. The frame component may be configured to direct or confine heat to areas of the assembly where ESD may be problematic.

According to the present disclosure, a semiconductor device includes a substrate, a semiconductor chip provided on the substrate, a case having a wall portion provided on the substrate and surrounding the semiconductor chip, and an overhang protruding from the wall portion toward an inside of a region surrounded by the wall portion and a resin that fills the region surrounded by the wall portion, wherein the overhang has an upper surface, and an inclined surface that is provided below the upper surface and on which a distance to the substrate decreases with an increase in distance from a tip of the overhang, the overhang being provided with a through hole penetrating from the inclined surface to the upper surface, and the through hole extends perpendicularly from the inclined surface.

Provided is a power semiconductor module that can secure insulating properties. A semiconductor element is mounted on a resin-insulated base plate including a circuit pattern, a resin insulating layer, and a base plate. A case enclosing the resin-insulated base plate is bonded to the resin insulating layer with an adhesive. The resin insulating layer and the case are bonded together with a region enclosed by the resin insulating layer and a tapered portion of the case formed closer to the resin insulating layer being filled with the adhesive made of a material identical to that of the sealing resin. Air bubbles in the adhesive appear in the tapered portion opposite to the resin insulating layer.