Patent classifications
H01L2224/4846
SEMICONDUCTOR DEVICE
A semiconductor device includes a conductive support member with first and second die pads, a first semiconductor element on the first die pad, a second semiconductor element on the second die pad for forming a first output-side circuit, and a sealing resin. The first semiconductor element includes a circuit part forming an input-side circuit, and an insulating part that transmits a signal between the input-side and the first output-side circuits, while providing electrical insulation between the input-side and the first output-side circuits. The sealing resin includes first and second side faces spaced apart in an x direction and a third side face perpendicular to a y direction. The conductive support member includes input-side terminals protruding from the first side face and first output-side terminals protruding from the second side face. The conductive support member is not exposed on the third side face.
SEMICONDUCTOR APPARATUS
A semiconductor apparatus includes: a metal plate; a semiconductor device mounted on the metal plate; an external terminal electrically connected to the semiconductor device or the metal plate; a metal wire wire-bonded to the semiconductor device, the metal plate or the external terminal; and a package covering and resin-sealing the semiconductor device, the metal plate and the metal wire, wherein the metal wire is bonded to a top-layer electrode of the semiconductor device at a first bond and a second bond, and the metal wire includes a low loop that is positioned between the first bond and the second bond, is adjacent to at least one of the first bond and the second bond and is not in contact with the top-layer electrode.
Semiconductor module, method for manufacturing the same, and power conversion device
A semiconductor module includes: a base plate; a semiconductor chip on the base plate; a case surrounding the semiconductor chip on the base plate, and sealing resin sealing the semiconductor chip inside the case, wherein a linear expansion coefficient of the sealing resin increases continuously from the semiconductor chip toward an upper surface of the sealing resin.
POWER MODULE HAVING INTERCONNECTED BASE PLATE WITH MOLDED METAL AND METHOD OF MAKING THE SAME
An interconnected base plate comprises a metal layer, a plurality of metal pads, and a molding encapsulation. The mold compound layer encloses a majority portion of the plurality of metal pads 240. A respective top surface of each of the plurality of metal pads is exposed from a top surface of the molding encapsulation. The respective top surface of said each of the first plurality of metal pads and the top surface of the mold compound layer are co-planar. A power module comprises the interconnected base plate, a plurality of chips, a plurality of bonding wires, a plurality of terminals, a plastic case, and a module-level molding encapsulation. A method, for fabricating an interconnected base plate, comprises the steps of forming a plurality of metal pads; loading a metal layer; forming a molding encapsulation; and applying a singulation process.
SEMICONDUCTOR DEVICE AND WIRE BONDING METHOD
A semiconductor device includes a semiconductor chip having an electrode pad, a terminal having a terminal pad, and a bonding wire. The bonding wire includes a first end portion, a first bonded portion bonded to the electrode pad, a loop portion extending between the semiconductor chip and the terminal, and a second bonded portion bonded to the terminal pad. The second bonded portion is a wedge bonded portion comprising a second end portion of the bonding wire opposite to the first end portion. A length of the first bonded portion in the first direction is greater than a length of the second bonded portion in the first direction.
IC PACKAGE WITH HALF-BRIDGE POWER MODULE
An integrated circuit (IC) package includes a substrate having a first region and a second region. The substrate includes a conductive path between the first region and the second region. The IC package also includes a lead frame having a first member and a second member that are spaced apart. The IC package further includes a half-bridge power module. The half-bridge power module includes a capacitor having a first node coupled to the first member of the lead frame and a second node coupled to the second member of the lead frame. The half-bridge power module also includes a high side die having a high side field effect transistor (FET) embedded therein and a low side die having a low side FET embedded therein. A source of the high side FET is coupled to a drain of the low side FET through the conductive path of the substrate.
Half-bridge module with coaxial arrangement of the DC terminals
A half-bridge module includes a substrate with a base metallization layer divided into a first DC conducting area, a second DC conducting area and an AC conducting area; at least one first power semiconductor switch chip bonded to the first DC conducting area and electrically interconnected with the AC conducting area; at least one second power semiconductor switch chip bonded to the AC conducting area and electrically interconnected with the second DC conducting area; and a coaxial terminal arrangement including at least one inner DC terminal. The at least first outer DC terminal and the at least one second outer DC terminal protrude from the module and are arranged in a row, such that the at least one inner DC terminal is coaxially arranged between the at least one first outer DC terminal and the at least one second outer DC terminal.
COOLING ARRANGEMENT FOR ELECTRICAL COMPONENTS, CONVERTER WITH A COOLING ARRANGEMENT, AND AIRCRAFT HAVING A CONVERTER
The disclosure specifies an arrangement including a circuit carrier board on which is mounted at least one electrical/electronic component. At least one heat pipe is formed in the circuit carrier board. The disclosure also specifies a power converter including the arrangement, and an aircraft including a power converter.
SEMICONDUCTOR CLIP AND RELATED METHODS
Implementations of semiconductor clips may include a die attach portion coupled to a step portion, a lead attach portion directly coupled to the step portion, a first alignment feature directly coupled to a first side of the lead attach portion, and a second alignment feature directly coupled to a second side of the lead attach portion. The second side may be opposite the first side. The lead attach portion may be in a plane substantially parallel with a plane formed by the die attach portion.
PACKAGE STRUCTURE, SEMICONDUCTOR DEVICE, AND FORMATION METHOD FOR PACKAGE STRUCTURE
A package structure includes a metal member and a resin member. The metal member has an obverse surface facing one side in a first direction. The resin member is disposed in contact with at least a portion of the obverse surface. The obverse surface has a roughened area. The roughened area includes a plurality of first trenches recessed from the obverse surface, each of the first trenches having a surface with a greater roughness than the obverse surface. The plurality of first trenches extend in a second direction perpendicular to the first direction and are next to each other in a third direction perpendicular to the first direction and the second direction. The plurality of first trenches are filled up with the resin member.