An object is to provide a semiconductor device which suppresses poor bonding between a metal pattern and an electrode terminal due to insufficient temperature rise at the time of bonding the metal pattern and the electrode terminal. The electrode terminal is branched into a plurality of branch portions in a width direction on one end side of an extending direction thereof, of the plurality of branch portions, a first branch portion and a second branch portion are bonded on the metal pattern via a bonding material, respectively, the first branch portion has a wider width than that of the second branch portion, and the bonding material between the second branch portion and the metal pattern is thinner than the bonding material between the first branch portion and the metal pattern.

A semiconductor includes a multilayer substrate including an insulating plate and a plurality of circuit boards disposed on a top face of the insulating plate, a semiconductor element disposed on a top face of one of the plurality of circuit boards, and having a main electrode disposed on a top face thereof, and a temperature measurement device for measuring a temperature of the semiconductor element. The temperature measurement device includes a cable unit composed of an insulated optical fiber, and a temperature measurement unit provided on one end of the cable unit, the temperature measurement unit being bonded to the main electrode of the semiconductor element using a bonding material.

Described is a power semiconductor module that includes: a frame made of an electrically insulative material; a first substrate seated in the frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a busbar extending from the first substrate through a side face of the frame; a current sensor module seated in a receptacle of the frame in sensing proximity of the busbar, the current sensor module including a current sensor attached to a circuit board; and a potting material fixing the current sensor module to the frame such that no air gap is present between the current sensor and the busbar. The potting material contacts the frame and the current sensor. Methods of producing the power semiconductor module are also described.

RC-IGBT chips and RC-IGBT chips correspond to a pair of adjacent RC-IGBT chips in an X direction between the RC-IGBT chips. The RC-IGBT chips satisfy a first arrangement condition in which the chips are separately arranged without a bonding point region and a bonding point region overlapping each other in a Y direction, and a second arrangement condition in which, in the Y direction, the chips are arranged to partially overlap so that a part of emitter electrodes excluding the bonding point region and the bonding point region overlap. The RC-IGBT chips also satisfy the first and second arrangement conditions described above.

A first wiring member bends at a first bent portion in the shape of the letter “L” in a side view and includes a first horizontal portion parallel to the principal surface of a semiconductor chip and a first vertical portion perpendicular to the first horizontal portion. A second wiring member bends at a second bent portion in a direction opposite to the first wiring member in the shape of the letter “L” in the side view and includes a second horizontal portion flush with the first horizontal portion and a second vertical portion a determined distance distant from the first vertical portion and parallel to the first vertical portion. A wiring holding portion fills a gap between the first and second vertical portions and a gap between the first and second bent portions. Therefore, stress applied to the vicinity of the first or second bent portion is relaxed.

A semiconductor apparatus includes: a metal plate; a semiconductor device mounted on the metal plate; an external terminal electrically connected to the semiconductor device or the metal plate; a metal wire wire-bonded to the semiconductor device, the metal plate or the external terminal; and a package covering and resin-sealing the semiconductor device, the metal plate and the metal wire, wherein the metal wire is bonded to a top-layer electrode of the semiconductor device at a first bond and a second bond, and the metal wire includes a low loop that is positioned between the first bond and the second bond, is adjacent to at least one of the first bond and the second bond and is not in contact with the top-layer electrode.

A semiconductor arrangement includes at least two switching devices of a first type electrically coupled in parallel between first and second terminals, and at least two switching devices of a second type electrically coupled in parallel between the second terminal and a third terminal. One first diode is electrically coupled in parallel to each switching device of the first type. One second diode is electrically coupled in parallel to each switching device of the second type. The switching devices are arranged in a power semiconductor module having first and second longitudinal sides and first and second narrow sides. The first type switching devices and first diodes are arranged alternatingly in one row along the first longitudinal side. The second type switching devices and second diodes are arranged alternatingly in another row along the second longitudinal side. An axis of symmetry that extends perpendicular to the first and second narrow sides.

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, amounting layer, switching elements, a moisture-resistant layer and a sealing resin. The substrate has a front surface facing in a thickness direction. The mounting layer is electrically conductive and disposed on the front surface. Each switching element includes an element front surface facing in the same direction in which the front surface faces along the thickness direction, a back surface facing in the opposite direction of the element front surface, and a side surface connected to the element front surface and the back surface. The switching elements are electrically bonded to the mounting layer with their back surfaces facing the front surface. The moisture-resistant layer covers at least one side surface. The sealing resin covers the switching elements and the moisture-resistant layer. The moisture-resistant layer is held in contact with the mounting layer and the side surface so as to be spanned between the mounting layer and the side surface in the thickness direction.

A semiconductor device includes a power MOS chip having a source electrode on a surface and a control chip mounted on a portion of the power MOS chip, wherein, viewing from a first outer edge of the power MOS chip extending in a first direction to the control chip, a first column bonding pad and a second column bonding pad are formed in a region of the source electrode where the control chip is not mounted, and wherein a distance between a second outer edge of the power MOS chip extending in a second direction and the first column bonding pad is longer than a distance between the second outer edge and the second column bonding pad.

An emitter interconnection connecting the emitter of a semiconductor switching element to a negative electrode is different in one or both of length and width from an emitter interconnection connecting the emitter of a semiconductor switching element to the negative electrode. At the time of switching, an induced electromotive force is generated at a gate control wire, or at a gate pattern, or at an emitter wire, by at least one of a current flowing through a positive electrode and a current flowing through the negative electrode, so as to reduce the difference between the emitter potential of the semiconductor switching element and the emitter potential of the semiconductor switching element caused by the difference.