H01L2224/4912

SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE
20200194405 · 2020-06-18 ·

A semiconductor device, includes: first semiconductor element including first and second electrodes; second semiconductor element including third and fourth electrodes; sealing resin covering the semiconductor elements; first, second, third, and fourth terminal portions respectively connected to the first, second, third, and fourth electrodes and exposed from the sealing resin; first island portion where the first semiconductor element is mounted; and second island portion where the second semiconductor element is mounted, wherein four quadrants divided by first imaginary line extending along second direction orthogonal to first direction and second imaginary line extending along third direction orthogonal to both the first and second directions are defined.

SEMICONDUCTOR DEVICE

A semiconductor device includes: a multilayer substrate which includes a circuit board and an insulating plate on which the circuit board is formed; and a contact part having a cylindrical hollow hole therein and an open end bonded to a bonding area on the front surface of the circuit board via bonding material. In the case of this semiconductor device, wettability of a contact area of the contact part with respect to the bonding material is approximately equal to wettability of at least the bonding area of the circuit board with respect to the bonding material. Thus, the rising of the bonding material into the hollow hole of the contact part during heating performed when the contact part is bonded to the circuit board is reduced.

SEMICONDUCTOR DEVICE

A semiconductor device includes: a multilayer substrate which includes a circuit board and an insulating plate on which the circuit board is formed; and a contact part having a cylindrical hollow hole therein and an open end bonded to a bonding area on the front surface of the circuit board via bonding material. In the case of this semiconductor device, wettability of a contact area of the contact part with respect to the bonding material is approximately equal to wettability of at least the bonding area of the circuit board with respect to the bonding material. Thus, the rising of the bonding material into the hollow hole of the contact part during heating performed when the contact part is bonded to the circuit board is reduced.

SEMICONDUCTOR PACKAGE WITH TOP CIRCUIT AND AN IC WITH A GAP OVER THE IC

A packaged integrated circuit (IC) includes a leadframe including a die pad and leads around the die pad, an analog IC die having first bond pads on its active top side, and a second circuit including second circuit bond pads attached to the analog IC die by an attachment layer configured as a ring with a hollow center that provides an inner gap. A bottom side of the analog IC or the second circuit is attached to the die pad. Bond wires couple at least some of the first bond pads or some of the second circuit bond pads to the leads, and there is a second coupling between others of the second circuit bond pads and others of the first bond pads. A mold compound is for encapsulating the second circuit and the analog IC.

SEMICONDUCTOR PACKAGE WITH TOP CIRCUIT AND AN IC WITH A GAP OVER THE IC

A packaged integrated circuit (IC) includes a leadframe including a die pad and leads around the die pad, an analog IC die having first bond pads on its active top side, and a second circuit including second circuit bond pads attached to the analog IC die by an attachment layer configured as a ring with a hollow center that provides an inner gap. A bottom side of the analog IC or the second circuit is attached to the die pad. Bond wires couple at least some of the first bond pads or some of the second circuit bond pads to the leads, and there is a second coupling between others of the second circuit bond pads and others of the first bond pads. A mold compound is for encapsulating the second circuit and the analog IC.

SEMICONDUCTOR DEVICE WITH DIE-SKIPPING WIRE BONDS

A semiconductor device is disclosed including a wire bonded die stack where the bond wires skip dies in the die stack to provide bond wires having a long length. In one example, the semiconductor dies are stacked on top of each other with offsets along two orthogonal axes so that the dies include odd numbered dies interspersed and staggered with respect to even numbered dies only one of the axes. Wire bonds may be formed between the odd numbered dies, skipping the even numbered dies, and wire bonds may be formed between the even numbered dies, skipping the odd numbered dies. The long length of the bond wires increases an inductance of the wire bonds relative to parasitic capacitance of the semiconductor dies, thereby increasing signal path bandwidth of the semiconductor device.

MAGNETIC SENSOR
20200064416 · 2020-02-27 ·

The present disclosure provides a magnetic sensor with improved accuracy or reliability. The magnetic sensor includes a first magnetism detection element that outputs a first detection signal, a second magnetism detection element that outputs a second detection signal, and a detection circuit that receives the first and second detection signals. The detection circuit corrects the first detection signal for each section in a ( 1/16n) period of the first detection signal, when n is a natural number. With this configuration, the magnetic sensor has high accuracy or high reliability, and therefore is useful as, for example, a magnetic sensor used for detecting a steering angle and the like of a vehicle.

CHIP-ON-LEAD SEMICONDUCTOR DEVICE PACKAGES WITH ELECTRICALLY ISOLATED SIGNAL LEADS

In a general aspect, a chip-on-lead semiconductor device package can include a leadframe having a plurality of signal leads. The plurality of signal leads can include at least two signal leads each having a first face with a first surface area and, opposite the first face, a second face with a second surface area, the second faces of the at least two signal leads being exposed on a surface of the chip-on-lead device package. The plurality of signal lead can also include at least one signal lead having a first face with a third surface area and, opposite the first face of the at least one signal lead, a second face with the second surface area, the second face of the at least one signal lead being exposed on the surface of the chip-on-lead semiconductor device package.

MULTI-BRANCH TERMINAL FOR INTEGRATED CIRCUIT (IC) PACKAGE

An example multi-branch terminal for an integrated circuit (IC) package is described herein. An example multi-branch terminal of an integrated circuit (IC), may include a first branch that may include an active bonding with a chip of the IC, wherein the active bonding may include a wire bonded to the chip of the IC; and a second branch that may include a passive bonding with the chip of the IC, wherein the passive bonding may include a capacitor bonded to the second branch and a first terminal of the IC.

IGNITER AND ENGINE IGNITION DEVICE
20240102438 · 2024-03-28 ·

Provided is an igniter capable of reducing occurrence of malfunction due to noise. An igniter (100) includes a switch element (111) having a first end, a temperature sensor (112) including at least one diode and having a cathode end (112B), a switch element control device (12) configured to control the switch element, and a switch element electrode (Pe) connected to the first end of the switch element and to the cathode end, and the switch element control device has a ground electrode (Pgnd) electrically isolated from the cathode end.