A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.

A die bonding process for assembling a semiconductor device includes the steps of applying a sintered-silver-use paste to each of a plurality of first regions on an upper surface of a chip mounting part, drying the sintered-silver-use paste and applying a silver paste to a second region located between/among the respective first regions. Further, the process includes the step of mounting a semiconductor chip onto the chip mounting part in such a manner that a rear surface of the semiconductor chip faces an upper surface of the chip mounting part with the sintered-silver-use paste and the silver paste being interposed. After mounting the chip, part of each of first, second, third and fourth corners of a principal surface of the semiconductor chip is located in each of the first regions.

A semiconductor device includes a first lead with a first block, a second lead with a second block, and a sealing resin partially covering the first and second leads. The first block is exposed from the sealing resin and has a first covered surface covered with an electroconductive layer, and a pair of first exposed surfaces spaced apart from each other via a part of the first covered surface. The second block is exposed from the sealing resin and has a second covered surface covered with an electroconductive layer, and a pair of second exposed surfaces spaced apart from each other via a part of the first covered surface.

An integrated circuit package and methods for packaging an integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first die and the palladium coated copper wires. The first die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.

A semiconductor device has a configuration in which a high-side module portion and a low-side module portion overlap each other. The semiconductor device further includes a control-side frame extending across the high-side module portion and the low-side module portion, and having a high-side integrated circuit and a low-side integrated circuit placed thereon. The high-side integrated circuit of the high-side module portion and the low-side integrated circuit of the low-side module portion are placed on one main surface of the control-side frame. At a boundary between the high-side module portion and the low-side module portion, the control-side frame is bent such that the high-side semiconductor chip and the low-side semiconductor chip face each other.

The semiconductor device of the present invention is a semiconductor device in which a first semiconductor chip including a first field effect transistor for a high-side switch, a second semiconductor chip including a second field effect transistor for a low-side switch, and a third semiconductor chip including a circuit that controls each of the first and second semiconductor chips are sealed with a sealing portion. A lead electrically connected to a pad of the first semiconductor chip for a source of the first field effect transistor and a lead electrically connected to a back-surface electrode of the second semiconductor chip for a drain of the second field effect transistor are disposed on the same side of the sealing portion in a plan view.

Reliability of a semiconductor module is improved. In a resin mold step of assembly of a semiconductor module, an IGBT chip, a diode chip, a control chip, a part of each of chip mounting portions are resin molded so that a back surface of each of the chip mounting portions is exposed from a back surface of a sealing body. After the resin molding, an insulating layer is bonded to the back surface of the sealing body so as to cover each back surface (exposed portion) of the chip mounting portions, and then, a TIM layer is bonded to an insulating layer. Here, a region of the TIM layer in a plan view is included in a region of the insulating layer.

A die bonding process for assembling a semiconductor device includes the steps of applying a sintered-silver-use paste to each of a plurality of first regions on an upper surface of a chip mounting part, drying the sintered-silver-use paste and applying a silver paste to a second region located between/among the respective first regions. Further, the process includes the step of mounting a semiconductor chip onto the chip mounting part in such a manner that a rear surface of the semiconductor chip faces an upper surface of the chip mounting part with the sintered-silver-use paste and the silver paste being interposed. After mounting the chip, part of each of first, second, third and fourth corners of a principal surface of the semiconductor chip is located in each of the first regions.

A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.

A semiconductor device includes: a semiconductor substrate having a first main surface; an aluminum electrode having a first surface facing the first main surface and a second surface opposite to the first surface, the aluminum electrode being disposed on the semiconductor substrate; a passivation film that covers a peripheral edge of the second surface and that is provided with an opening from which a portion of the second surface is exposed; a copper film disposed on the second surface exposed from the opening so as to be separated from the passivation film; and a metal film disposed on the second surface exposed from between the passivation film and the copper film. The metal film is constituted of at least one selected from a group consisting of a nickel film, a tantalum film, a tantalum nitride film, a tungsten film, a titanium film, and a titanium nitride film.