Patent classifications
H01L2224/83097
ADHESIVE TRANSFER FILM AND METHOD FOR MANUFACTURING POWER MODULE SUBSTRATE BY USING SAME
The present disclosure relates to an adhesive transfer film for bonding a semiconductor chip and a spacer to a substrate and a method for manufacturing a power module substrate by using same, the adhesive transfer film being obtained by manufacturing an Ag sintering paste in the form of a film. The present disclosure can reduce the process time by minimizing a sintering process, and can reduce equipment investment cost.
PRE-PLATED SUBSTRATE FOR DIE ATTACHMENT
A method for attaching a semiconductor die to a substrate includes providing a substrate that includes an attachment layer at a surface of the substrate. The attachment layer is covered by a protective flash plating layer. The protective flash plating layer has a reflow temperature less than or equal to a reflow temperature of the attachment layer. The method further includes preheating the substrate to a temperature greater than or equal to a reflow temperature of the attachment layer, attaching a semiconductor die to the attachment layer, and cooling the substrate and semiconductor die.
CONDUCTIVE COMPOSITION AND ELECTRONIC PARTS USING THE SAME
A conductive composition, which can form bonded portions and is capable of maintaining a thickness of the bonded portions and bonding strength, and which includes: (A) silver fine particles having a number average particle diameter of primary particles of 40 nm to 400 nm, (B) a solvent, and (C) thermoplastic resin particles having a maximal value of an endothermic peak in a DSC chart, determined by a measurement using a differential scanning calorimeter, within a range of 80° C. to 170° C.
Die-attach method to compensate for thermal expansion
In sonic examples, a method includes pre-stressing a flange, heating the flange to a die-attach temperature, and attaching a die to the flange at the die-attach temperature using a die-attach material. In some examples, the flange includes a metal material, the die-attach temperature may be at least two hundred degrees Celsius, and the die-attach material may include solder and/or an adhesive. In some examples, the method includes cooling the semiconductor die and metal flange to a room temperature after attaching the semiconductor die to the metal flange at the die-attach temperature using a die-attach material.
Method for setting conditions for heating semiconductor chip during bonding, method for measuring viscosity of non-conductive film, and bonding apparatus
Provided is a method for setting the conditions for heating a semiconductor chip during bonding of the semiconductor chip using an NCF, wherein a heating start temperature and a rate of temperature increase are set on the basis of a viscosity characteristic map that indicates changes in viscosity with respect to temperature of the NCF at various rates of temperature increase and a heating start temperature characteristic map that indicates changes in viscosity with respect to temperature of the NCF when the heating start temperature is changed at the same rate of temperature increase.
Semiconductor device and manufacturing method thereof with Cu and Sn intermetallic compound
A method of manufacturing a semiconductor device which includes a plurality of members including a semiconductor element is provided. The method may include disposing one surface of a first member which is one of the plurality of members and one surface of a second member which is another one of the plurality of members opposite to each other with a tin-based (Sn-based) solder material interposed therebetween, and bonding the first member and the second member by melting and solidifying the Sn-based solder material. At least the one surface of the first member may be constituted of a nickel-based (Ni-based) metal, and at least the one surface of the second member may be constituted of copper (Cu).
SEMICONDUCTOR PACKAGE
A semiconductor package includes a base chip and at least one semiconductor chip disposed on the base chip. An adhesive film is disposed between the base chip and the at least one semiconductor chip and is configured to fix the at least one semiconductor chip on the base chip. The adhesive film includes an inner film portion that overlaps the at least one semiconductor chip in a thickness direction of the base chip, and an outer film portion that does not overlap the at least one semiconductor chip in the thickness direction of the base chip. A width of the outer film portion in a direction perpendicular to a lateral edge of the at least one semiconductor chip is substantially uniform within a deviation range of 20% of an average width of the outer film portion.
Semiconductor package
A semiconductor package includes a base chip and at least one semiconductor chip disposed on the base chip. An adhesive film is disposed between the base chip and the at least one semiconductor chip and is configured to fix the at least one semiconductor chip on the base chip. The adhesive film includes an inner film portion that overlaps the at least one semiconductor chip in a thickness direction of the base chip, and an outer film portion that does not overlap the at least one semiconductor chip in the thickness direction of the base chip. A width of the outer film portion in a direction perpendicular to a lateral edge of the at least one semiconductor chip is substantially uniform within a deviation range of 20% of an average width of the outer film portion.
METHOD FOR MANUFACTURING STRUCTURE
Provided is a method of manufacturing a structure that can be easily bonded to a bonding target. The method of manufacturing a structure includes: a conductive layer forming step of forming a conductive layer having conductivity on a part of a surface of an insulating support including at least one surface; a valve metal layer forming step of forming a valve metal layer that covers at least a part of the conductive layer; an anodic oxidation film forming step of forming an anodic oxidation film by performing an anodization treatment on the valve metal layer in a region on the conductive layer using the conductive layer as an electrode; a micropore forming step of forming a plurality of micropores that extend in a thickness direction on the anodic oxidation film; and a filling step of filling the micropores with a conductive material, in which a valve metal layer removing step of removing the valve metal layer having undergone the anodic oxidation film forming step is performed between the anodic oxidation film forming step and the filling step.
CHEMICAL BONDING METHOD AND JOINED STRUCTURE
The present invention achieves chemical bonding by means of a joined film made of oxides formed on a joined surface. In a vacuum container, amorphous oxide thin films are respectively formed on smooth surfaces of two substrates, and the two substrates overlap such that the amorphous oxide thin films formed on the two substrates come into contact with each other, thereby causing chemical bonding involving an atomic diffusion at a joined interface between the amorphous oxide thin films to join the two substrates.