H01L2224/83097

Method for transient liquid-phase bonding between metal materials using a magnetic force

Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.

Semiconductor assembly and method of manufacturing the same
11094662 · 2021-08-17 · ·

The present disclosure provides a semiconductor assembly. The semiconductor assembly includes a first device, a second device, and an interconnect structure configured to electrically coupled the first device and the second device. The second device is stacked on the first device. The interconnect structure includes a first leg, a second leg, and a cross member connecting the first leg to the second leg, wherein the first leg penetrates through the cap dielectric layer and the second device and contacts a first conductive feature of the first device, and a second leg penetrates through the cap dielectric layer and contacts a second conductive feature of the second device.

SEMICONDUCTOR ASSEMBLY AND METHOD OF MANUFACTURING THE SAME
20210242161 · 2021-08-05 ·

The present disclosure provides a semiconductor assembly. The semiconductor assembly includes a first device, a second device, and an interconnect structure configured to electrically coupled the first device and the second device. The second device is stacked on the first device. The interconnect structure includes a first leg, a second leg, and a cross member connecting the first leg to the second leg, wherein the first leg penetrates through the cap dielectric layer and the second device and contacts a first conductive feature of the first device, and a second leg penetrates through the cap dielectric layer and contacts a second conductive feature of the second device.

Bonded structure and method of manufacturing the same

A highly reliable bonded structure having excellent thermal fatigue resistance characteristics and thermal stress relaxation characteristics is provided. The bonded structure of the present invention comprises a first member, a second member capable of being bonded to the first member, and a bonding part interposed between a first bond surface at the first member side and a second bond surface at the second member side to bond the first member and the second member. The bonding part has at least a bonding layer, a reinforcing layer, and an intermediate layer. The bonding layer is composed of an intermetallic compound and bonded to the first bond surface.

CHIP BONDING METHOD AND BONDING DEVICE

A chip bonding method and a bonding device. The chip bonding method is used for bonding a chip to a display module, the display module includes a substrate and a functional layer on the substrate, the substrate includes a first substrate portion and a second substrate portion, the functional layer is on the first substrate portion, and an electrode is on an upper side of the second substrate portion. The chip bonding method includes: forming a light absorbing film layer on a side of the second substrate portion facing away from the electrode; coating a conductive adhesive film on the electrode, and placing the chip on the conductive adhesive film; and irradiating, by using a laser beam, a side of the second substrate portion facing away from the electrode.

SEMICONDUCTOR DEVICE INCLUDING AN ELECTRICAL CONTACT WITH A METAL LAYER ARRANGED THEREON

A semiconductor device includes a semiconductor die, an electrical contact arranged on a surface of the semiconductor die, and a metal layer arranged on the electrical contact, wherein the metal layer includes a singulated part of at least one of a metal foil, a metal sheet, a metal leadframe, or a metal plate. When viewed in a direction perpendicular to the surface of the semiconductor die, a footprint of the electrical contact and a footprint of the metal layer are substantially congruent.

SEMICONDUCTOR DEVICES AND METHODS FOR PRODUCING THE SAME
20210119414 · 2021-04-22 ·

Semiconductor devices, such as vertical-cavity surface-emitting lasers, and methods for manufacturing the same, are disclosed. The semiconductor devices include contact extensions and electrically conductive adhesive material, such as fusible metal alloys or electrically conductive composites. In some instances, the semiconductor devices further include structured contacts. These components enable the production of semiconductor devices having minimal distortion. For example, arrays of vertical-cavity surface-emitting lasers can be produced exhibiting little to no bowing. Semiconductor devices having minimal distortion exhibit enhanced performance in some instances.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20210111072 · 2021-04-15 · ·

Provided is a method for manufacturing a semiconductor device suitable for achieving low wiring resistance between semiconductor elements that is bonded via an adhesive layer and multi-layered. The method according to the present invention is as follows. First, a wafer laminate (W) is prepared, the wafer laminate (W) including a wafer (10) having a circuit forming surface (10a), a wafer (20) having a main surface (20a) and a back surface (20b), and an adhesive layer (30) containing an SiOC-based polymer. Then, a hole (H) is formed in the wafer laminate (W) by etching the wafer laminate (W) from the wafer (20) side via a mask pattern masking a portion of the main surface (20a) side of the wafer (20), the hole (H) extending through the wafer (20) and the adhesive layer (30) and reaching a wiring pattern (12b) in the wafer (10). Then, an insulating film (41) is formed on an inner surface of the hole (H). Then, the insulating film (41) on a bottom surface of the hole (H) is removed. Then, the wafer laminate (W) is subjected to a cleaning treatment (an oxygen plasma treatment and/or an Ar sputtering treatment). Then, a conductive portion is formed in the hole (H).

LIGHT EMITTING ELEMENT, LIGHT EMITTING DEVICE, AND MANUFACTURING METHOD THEREOF
20210050325 · 2021-02-18 ·

A light emitting element, a light emitting device and a manufacturing method thereof are provided. The manufacturing method of the light emitting device includes forming a first electrode and a second electrode spaced apart from each other on a substrate on which the light emitting area is defined; injecting a solution including a light emitting element and a liquid crystal molecule into the light emitting area; and aligning the light emitting element such that the first electrode and the second electrode are electrically coupled; wherein the light emitting element includes a first semiconductor layer; a second semiconductor layer; an active layer interposed between the first semiconductor layer and the second semiconductor layer; an insulation layer formed to surround an outer surface of the active layer; and an organic ligand layer formed on an outer surface of the insulating layer.

Electrical binding structure and method of forming the same
10916518 · 2021-02-09 · ·

An electrical binding structure is provided, which includes a substrate, a contact pad set, and a combination of a micro device and an electrode. The contact pad set is on the substrate in which the contact pad set includes at least one contact pad, and the at least one contact pad is conductive. The combination is on the contact pad set. Opposite sides of the electrode are respectively in contact with the micro device and the contact pad set in which at least the contact pad set and the electrode define at least one volume space. A vertical projection of the at least one volume space on the substrate is overlapped with a vertical projection of one of the contact pad set and the electrode on the substrate, and is enclosed by a vertical projection of an outer periphery of the micro device on the substrate.