Embodiments herein describe techniques for bonded wafers that includes a first wafer bonded with a second wafer, and a stress compensation layer in contact with the first wafer or the second wafer. The first wafer has a first stress level at a first location, and a second stress level different from the first stress level at a second location. The stress compensation layer includes a first material at a first location of the stress compensation layer that induces a third stress level at the first location of the first wafer, a second material different from the first material at a second location of the stress compensation layer that induces a fourth stress level different from the third stress level at the second location of the first wafer. Other embodiments may be described and/or claimed.

A power electronics module includes a substrate with a substrate metallization layer, which is separated into conducting areas for providing conducting paths for the power electronics module; a semiconductor switch chip bonded with a first power electrode to a first conducting area of the substrate metallization layer; a conductor plate bonded to a second power electrode of the semiconductor switch chip opposite to the first power electrode.

A stacked MLCC capacitor is provided wherein the capacitor stack comprises multilayered ceramic capacitors wherein each multilayered ceramic capacitor comprises first electrodes and second electrodes in an alternating stack with a dielectric between each first electrode and each adjacent second electrode. The first electrodes terminate at a first side and the second electrodes second side. A first transient liquid phase sintering conductive layer is the first side and in electrical contact with each first electrode; and a second transient liquid phase sintering conductive layer is on the second side and in electrical contact with each second electrode.

A silver-indium transient liquid phase method of bonding a semiconductor device and a heat-spreading mount, and a semiconductor structure having a silver-indium transient liquid phase bonding joint are provided. With the ultra-thin silver-indium transient liquid phase bonding joint formed between the semiconductor device and the heat-spreading mount, its thermal resistance can be minimized to achieve a high thermal conductivity. Therefore, the heat spreading capability of the heat-spreading mount can be fully realized, leading to an optimal performance of the high power electronics and photonics devices.

A method of soldering includes providing a substrate having a first metal joining surface, providing a semiconductor die having a second metal joining surface, providing a solder preform having a first interface surface and a second interface surface, arranging the solder preform between the substrate and the semiconductor die such that the first interface surface faces the first metal joining surface and such that the second interface surface faces the second metal joining surface, and performing a mechanical pressure-free diffusion soldering process that forms a soldered joint between the substrate and the semiconductor die by melting the solder preform and forming intermetallic phases in the solder. One or both of the first interface surface and the second interface surface has a varying surface profile that creates voids between the solder preform and one or both of the substrate and the semiconductor die before the melting of the solder preform.

A power module (1) is disclosed, comprising: first and second substrates (10), each substrate patterned layer of electrically conductive material (12), a plurality of pre-packed power cells (20), positioned between the substrates, each cell comprising: an electrically insulating core (21) embedding at least one power die (22), and two external layers (23) of electrically conductive material on opposite sides of the electrically insulating core (21), said external layers being respectively connected to each patterned layers of the substrates,
wherein each external layer of a pre-packed power cell comprises a contact pad (230) connected to a respective contact (220) of the power die through connections arranged in the electrically insulating core (21), said contact pad having a surface area greater than the surface area of the power die electrical contact to which it is connected.

A power module (1) is disclosed, comprising: first and second substrates (10), each substrate patterned layer of electrically conductive material (12), a plurality of pre-packed power cells (20), positioned between the substrates, each cell comprising: an electrically insulating core (21) embedding at least one power die (22), and two external layers (23) of electrically conductive material on opposite sides of the electrically insulating core (21), said external layers being respectively connected to each patterned layers of the substrates,
wherein each external layer of a pre-packed power cell comprises a contact pad (230) connected to a respective contact (220) of the power die through connections arranged in the electrically insulating core (21), said contact pad having a surface area greater than the surface area of the power die electrical contact to which it is connected.

Thermally conductive adhesive materials having a first metallic component with a high melting point metal; a second metallic component having a low melting point metal; a fatty acid, an optional amine, an optional triglyceride and optional additives. Also provided are methods of making the same and uses thereof for adhering electronic components to substrates.

Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.

Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.