A method for manufacturing a display device includes checking a particle positioned between a display panel and a connecting member, irradiating a laser to an upper surface of the connecting member overlapping at least a part of the particle, removing the connecting member overlapping a region to which the laser is irradiated, removing the particle overlapping a region to which the laser is irradiated, and disposing a desiccant in a hole formed by removing the connecting member and the particle.

A microscale selective laser sintering (-SLS) that improves the minimum feature-size resolution of metal additively manufactured parts by up to two orders of magnitude, while still maintaining the throughput of traditional additive manufacturing processes. The microscale selective laser sintering includes, in some embodiments, ultra-fast lasers, a micro-mirror based optical system, nanoscale powders, and a precision spreader mechanism. The micro-SLS system is capable of achieving build rates of at least 1 cm.sup.3/hr while achieving a feature-size resolution of approximately 1 m. In some embodiments, the exemplified systems and methods facilitate a direct write, microscale selective laser sintering -SLS system that is configured to write 3D metal structures having features sizes down to approximately 1 m scale on rigid or flexible substrates. The exemplified systems and methods may operate on a variety of material including, for example, polymers, dielectrics, semiconductors, and metals.

An integrated circuit packaging method and an integrated packaging circuit, the integrated circuit packaging method including: circuit layers are provided on the top surface of a substrate, the bottom surface of the substrate or the interior of the substrate, the circuit layers having circuit pins; the substrate is provided with connection through holes, and the connection through holes are joined up with the circuit pins; a device is placed on the substrate, and the device is provided with device pins on a surface facing the substrate, which makes the device pins join up with a first opening of the connection through holes; conductive layers are fabricated in the connection through holes by means of a second opening of the connection through holes; and the conductive layers electrically connect the device pins to the circuit pins.

An integrated circuit packaging method and an integrated packaging circuit, the integrated circuit packaging method including: circuit layers are provided on the top surface of a substrate, the bottom surface of the substrate or the interior of the substrate, the circuit layers having circuit pins; the substrate is provided with connection through holes, and the connection through holes are joined up with the circuit pins; a device is placed on the substrate, and the device is provided with device pins on a surface facing the substrate, which makes the device pins join up with a first opening of the connection through holes; conductive layers are fabricated in the connection through holes by means of a second opening of the connection through holes; and the conductive layers electrically connect the device pins to the circuit pins.

A semiconductor device is vertically mounted on a medium such as a printed circuit board (PCB). The semiconductor device comprises a block of semiconductor dies, mounted in a vertical stack without offset. Once formed and encapsulated, side grooves may be formed in the device exposing electrical conductors of each die within the device. The electrical conductors exposed in the grooves mount to electrical contacts on the medium to electrically couple the semiconductor device to the medium.

An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.

A semiconductor device includes a silicon carbide layer, a metal carbide layer arranged over the silicon carbide layer, and a solder layer arranged over and in contact with the metal carbide layer.

One or more chips are transferred from one substrate to another by using one or more polymer layers to secure the one or more chips to an intermediate carrier substrate. While secured to the intermediate carrier substrate, the one or more chips may be transported or put through further processing or fabrication steps. To release the one or more chips, the adhesion strength of the one or more polymer layers is gradually reduced to minimize potential damage to the one or more chips.

An electronic device which connects a circuit film to a display panel by applying a conductive material to the insides of holes formed in the circuit film, so as to improve reliability of bonding, and a display device using the same, are discussed.

Disclosed is a semiconductor package comprising a lower substrate including a conductive line; a first semiconductor chip on the lower substrate; an under-fill layer between the first semiconductor chip and the lower substrate, the under-fill layer including a central part below the first semiconductor chip and an edge part isolated from direct contact with the central part in a first direction parallel to a top surface of the lower substrate, and a recess region between the central part and the edge part. The recess region may be defined by a sidewall of the central part, a sidewall of the edge part, and a top surface of the conductive line in the lower substrate.