Patent classifications
H01L2224/92144
Circuit board structure and method for manufacturing a circuit board structure
The present publication discloses a method for manufacturing a circuit-board structure. In the method, a conductor layer is made, which comprises a conductor foil and a conductor pattern on the surface of the conductor foil. A component is attached to the conductor layer and the conductor layer is thinned, in such a way that the conductor material of the conductor layer is removed from outside the conductor pattern.
MECHANICAL PUNCHED VIA FORMATION IN ELECTRONICS PACKAGE AND ELECTRONICS PACKAGE FORMED THEREBY
An electronics package includes an electrically insulating substrate having a first surface and a second surface, an adhesive layer positioned on the first surface of the electrically insulating substrate, and an electrical component having a top surface coupled to the adhesive layer on a surface thereof opposite the electrically insulating substrate, the electrical component having contact pads on the top surface. Vias are formed through the electrically insulating substrate and the adhesive layer at locations corresponding to the contact pads by way of a mechanical punching operation, with each of the vias having a via wall extending from the second surface of the electrically insulating substrate to a respective contact pad. At each via, the electrically insulating substrate comprises a protrusion extending outwardly from the first surface thereof so as to cover at least part of the adhesive layer in forming part of the via wall.
ELECTRONIC-COMPONENT-EMBEDDED SUBSTRATE AND METHOD OF MAKING THE SAME
An electronic-component-embedded substrate includes a base having flexibility and cavities formed therethrough, electronic components disposed in the cavities, respectively, and interconnects disposed on the base and connected to the electronic components, wherein the interconnects include a metal foil having openings that abut the electronic components, and include a plating layer disposed on the metal foil and connected to the electronic components through the openings.
SEMICONDUCTOR DEVICE
A semiconductor device includes a film substrate, an adhesive on a first surface of the film substrate, an electronic component on the adhesive, a wiring layer on a second surface of the film substrate opposite from the first surface, and a reinforcement member in an area around the electronic component on the adhesive. The wiring layer is connected to the electronic component through a via hole piercing through the film substrate and the adhesive. The reinforcement member has a thickness smaller than the thickness of the electronic component.
Light emitting device package
A light emitting device package according to an embodiment may include a first package body including first and second openings passing through the upper surface and lower surface thereof; a second package body disposed on the first package body and including a third opening passing through the upper surface and lower surface thereof; a light emitting device disposed in the third opening; a first resin disposed between the upper surface of the first package body and the light emitting device; and a second resin disposed in the third opening. According to the embodiment, the upper surface of the first package body may be coupled to the lower surface of the second package body, the first package body may include a recess recessed from the upper surface of the first package body to the lower surface of the first package body, the first resin may be disposed in the recess, the first resin and the second resin include materials different from each other, and the first resin may be in contact with the light emitting device and the second resin.
METHOD FOR PRODUCING ELECTRONIC DEVICE
The present invention is a method for producing an electronic device having a drive circuit including a solar cell structure, the method including the steps of: obtaining a bonded wafer by bonding a first wafer having a plurality of independent solar cell structures including a compound semiconductor, the solar cell structures being formed on a starting substrate by epitaxial growth, and a second wafer having a plurality of independent drive circuits formed, so that the plurality of solar cell structures and the plurality of drive circuits are respectively superimposed; wiring the bonded wafer so that electric power can be supplied from the plurality of solar cell structures to the plurality of drive circuits respectively; and producing an electronic device having the drive circuit including the solar cell structure by dicing the bonded wafer. This provides a method for producing an electronic device including a drive circuit and a solar cell structure in one chip and having a suppressed production cost.
Raised Via for Terminal Connections on Different Planes
A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom terminal of a component device to the metal layer. The metal layer has a first portion directly underlying and bonded to the component device. A raised via is formed on the metal layer, and the metal layer has a second portion directly underlying the raised via. The metal layer is etched to separate the first portion and the second portion of the metal layer from each other. The method further includes coating the raised via and the component device in a dielectric layer, revealing the raised via and a top terminal of the component device, and forming a redistribution line connecting the raised via to the top terminal.
Semiconductor devices and methods of manufacturing semiconductor devices
A packaged semiconductor device includes a substrate with first and second opposing major surfaces. A stacked semiconductor device structure is connected to the first major surface and includes a plurality of semiconductor die having terminals. Conductive interconnect structures electrically connect the terminals of the semiconductor dies together. The semiconductor dies are stacked together so that the terminals are exposed, and the stacked semiconductor device structure comprises a stepped profile. The conductive interconnect structures comprise a conformal layer that substantially follows the stepped profile.
Semiconductor device
A semiconductor device includes a film substrate, an adhesive on a first surface of the film substrate, an electronic component on the adhesive, a wiring layer on a second surface of the film substrate opposite from the first surface, and a reinforcement member in an area around the electronic component on the adhesive. The wiring layer is connected to the electronic component through a via hole piercing through the film substrate and the adhesive. The reinforcement member has a thickness smaller than the thickness of the electronic component.
INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME
Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a glass core layer, where the glass core layer includes a first major surface, a second major surface, and a cavity disposed between the first major surface and the second major surface of the glass core layer. The package also includes a die disposed in the cavity of the glass core layer, an encapsulant disposed in the cavity between the die and a sidewall of the cavity, a first patterned conductive layer disposed adjacent the first major surface of the glass core layer, and a second patterned conductive layer disposed adjacent the second major surface of the glass core layer. The die is electrically connected to at least one of the first and second patterned conductive layers.