The present invention provides a package structure of a fingerprint identification chip, including: a metal substrate, having a through opening and two grooves extending from two opposite sides of the through opening; a fingerprint identification chip, disposed in the through opening and having an upper surface and a lower surface, the lower surface having a bonding pad; a cover plate, fixedly disposed on the metal substrate and covering the upper surface of the fingerprint identification chip; a flexible printed circuit (FPC), disposed on the lower surface of the fingerprint identification chip and having a first surface and a second surface, the second surface having a first metal contact; and a metal reinforcing plate, inserted into the two grooves and covering the through opening, where the bonding pad is electrically connected to the first metal contact through a wire.

A packaged integrated circuit (IC) device includes a first IC die with a first inductor, a first layer of adhesive on a first major surface of the first IC die, an isolation layer over the first layer of adhesive, a second layer of adhesive on the isolation layer, a second IC die on the second layer of adhesive, and a second inductor in the second IC die aligned to communicate with the first inductor. The isolation layer extends a prespecified distance beyond a first edge of the second IC die.

A package structure includes a first redistribution layer, a second redistribution layer, a die, a plurality of conductive pillars and a die-stacked structure. The first redistribution layer has a first surface and a second surface opposite to the first surface. The second redistribution layer is disposed above the first surface. The die is disposed between the first redistribution layer and the second redistribution layer and has an active surface and a rear surface opposite to the active surface. The active surface is adhered to the first surface, and the die is electrically connected to the first redistribution layer. The conductive pillars are disposed and electrically connected between the first redistribution layer and the second redistribution layer. The die-stacked structure is bonded on the second redistribution layer.

According to one embodiment, the first end part of the first semiconductor chip in a lower stage protrudes to a larger extent in a first direction than the first end part of the first semiconductor chip in an upper stage. The second end part of the second semiconductor chip in a lower stage protrudes to a larger extent in a second direction opposite from the first direction than the second end part of the second semiconductor chip in an upper stage. The first interlayer semiconductor chip includes a first portion, a second portion, and a third electrode pad. The first portion overlaps the first chip group. The second portion protrudes in the second direction beyond the first chip group and the second chip group and is thicker than the first portion. The third electrode pad is provided on the second portion and bonded with the third metal wire.

Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.

A light emitting device includes: a base comprising a first lead, a second lead, and a supporting member; a light emitting element mounted on the first lead; a protection element mounted on the second lead; a wire including a first end and a second end, wherein the first end is connected to an upper surface of the first lead, and the second end is connected to a first terminal electrode of the protection element; a resin frame located on an upper surface of the base, wherein the resin frame covers at least part of the protection element and surrounds the light emitting element and the first end of the wire; a first resin member surrounded by the resin frame and covering the light emitting element and the first end of the wire; and a second resin member covering the resin frame and the first resin member.

Shielded semiconductor devices and methods for fabricating shielded semiconductor devices are provided. An exemplary magnetically shielded semiconductor device includes a substrate having a top surface and a bottom surface. An electromagnetic-field-susceptible semiconductor component is located on and/or in the substrate. The magnetically shielded semiconductor device includes a top magnetic shield located over the top surface of the substrate. Further, the magnetically shielded semiconductor device includes a bottom magnetic shield located under the bottom surface of the substrate. Also, the magnetically shielded semiconductor device includes a sidewall magnetic shield located between the top magnetic shield and the bottom magnetic shield.

According to one embodiment, the first end part of the first semiconductor chip in a lower stage protrudes to a larger extent in a first direction than the first end part of the first semiconductor chip in an upper stage. The second end part of the second semiconductor chip in a lower stage protrudes to a larger extent in a second direction opposite from the first direction than the second end part of the second semiconductor chip in an upper stage. The first interlayer semiconductor chip includes a first portion, a second portion, and a third electrode pad. The first portion overlaps the first chip group. The second portion protrudes in the second direction beyond the first chip group and the second chip group and is thicker than the first portion. The third electrode pad is provided on the second portion and bonded with the third metal wire.

Provided is a semiconductor device with high reliability. In order to solve the above problems, according to the present invention, the semiconductor device includes a heat dissipating substrate, an insulating substrate arranged on the heat dissipating substrate and having a wiring layer, a plurality of semiconductor elements arranged on the insulating substrate, a conductive block electrically connected to a front surface electrode of the semiconductor element, and a terminal electrode, in which the conductive block has a convex portion, and the convex portion is bonded to the insulating substrate.

A semiconductor device includes a first semiconductor chip having a first inductor element and a second inductor element on a first main surface side, a second semiconductor chip having a third inductor element on a second main surface side, and a third semiconductor chip having a fourth inductor element on a third main surface side. The first and second inductor elements are arranged to be separated from each other in a first direction of the first main surface, the first and second main surfaces face each other, and the first and third inductor elements overlap each other. The first and third main surfaces face each other, the second and fourth inductor elements overlap each other, and a creepage distance between the second and third semiconductor chips is larger than a separation distance between the second and third semiconductor chips.