A DC offset cancellation circuit and a DC offset cancellation method are disclosed. The DC offset cancellation circuit comprises a high-speed amplifier, a voltage comparator, a microprocessor, and a digital-to-analog converter. The high-speed amplifier comprises an input stage with a DC offset cancellation function, an amplification stage, and an output buffer stage. The voltage comparator is connected to the output buffer stage. The microprocessor is connected to the voltage comparator. The digital-to-analog converter is connected to the microprocessor. The digital-to-analog converter is connected to the input stage.

An operational amplifier includes a differential amplification circuit configured to receive and amplify an input voltage to generate an output voltage, and receive a feedback signal, and the feedback signal adjusts a common-mode voltage of the output voltage, a reference voltage generation circuit configured to detect status information of the operational amplifier, and generate a reference voltage based on the status information, where the status information includes a temperature or an operating voltage of the operational amplifier, and a common-mode feedback circuit configured to receive the output voltage and the reference voltage, and provide the feedback signal to the differential amplification circuit based on the output voltage and the reference voltage.

A gain stage includes an offset cancellation loop coupled to a first amplifier. The first amplifier has a first transfer function and a first gain, and the offset cancellation loop includes a second amplifier having a second transfer function and a second gain. The second transfer function is based on an inverse of the first transfer function and the second gain based on an inverse of the first gain. When the offset cancellation loop feeds back an output signal of the first amplifier to an input of the first amplifier, a high-pass pole (or high-pass corner frequency) of the first amplifier is maintained at a constant level in spite of variations in the gain of the first amplifier. In one case, the second amplifier in the offset cancellation loop may be a simpler and lower power version of the first amplifier.

A gain stage includes an offset cancellation loop coupled to a first amplifier. The first amplifier has a first transfer function and a first gain, and the offset cancellation loop includes a second amplifier having a second transfer function and a second gain. The second transfer function is based on an inverse of the first transfer function and the second gain based on an inverse of the first gain. When the offset cancellation loop feeds back an output signal of the first amplifier to an input of the first amplifier, a high-pass pole (or high-pass corner frequency) of the first amplifier is maintained at a constant level in spite of variations in the gain of the first amplifier. In one case, the second amplifier in the offset cancellation loop may be a simpler and lower power version of the first amplifier.

A cascade of amplifier stages has a differential input and a differential output. The cascade of amplifier stages includes at least one differential amplifier circuit including first and second transistors, at least one of the first and second transistors having a control terminal and a body terminal. A mismatch between the first and second transistors generates an input offset. A feedback network couples the differential output to the body terminal in order to cancel the input offset. The feedback network includes a low-pass filter and a differential amplifier stage.

An apparatus such as an electronic circuit includes an input operable to receive an input signal; a dynamic common mode adjustor operable to: i) derive a differential signal from the received input signal, and ii) control an offset of the differential signal as a function of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal. In one arrangement, the offset differential signal outputted from the output includes a first signal and a second signal; a difference between the second signal and the first signal proportionally varies with respect to the received input signal.

Various embodiments of the present technology may comprise methods and apparatus for driver calibration. The methods and apparatus may comprise various circuits and/or systems to minimize an offset output current (e.g., a drive current) due to an offset voltage in an operational amplifier. The methods and apparatus may comprise a current comparator circuit and a replica circuit that operate in conjunction with each other to monitor the drive current and provide a feedback signal, which is then used to adjust the drive current and improve the accuracy of the drive current.

Various embodiments of the present technology may comprise methods and apparatus for driver calibration. The methods and apparatus may comprise various circuits and/or systems to minimize an offset output current (e.g., a drive current) due to an offset voltage in an operational amplifier. The methods and apparatus may comprise a current comparator circuit and a replica circuit that operate in conjunction with each other to monitor the drive current and provide a feedback signal, which is then used to adjust the drive current and improve the accuracy of the drive current.

An offset cancellation circuit and method are provided where successive stages of cascaded amplifiers are operated in a saturated state. Biasing is provided, by a feedback amplifier, connected in a feedback loop for each cascaded amplifier, so as to be responsive, in a non-saturated state, to the input of an associated amplifier stage operating in the saturated state.

Provided is a transconductance amplifier including a common-mode feedback circuit that does not affect an operation of the transconductance amplifier. The transconductance amplifier has a transconductance amplifier circuit configured to generate an output current based on an input voltage and a common-mode feedback circuit configured to determine a DC operating point of an output of the transconductance amplifier circuit. The common-mode feedback circuit has a plurality of level shift circuits configured to shift levels of input voltages to output the voltages, and are connected to control terminals of a plurality of transistors.