Signals sent to a memory component are received by circuitry included in the memory component. The circuitry comprises a comparator circuit to process the received signals. The circuitry further comprises a resistor-capacitor (RC) circuit coupled to the comparator circuit to increase bandwidth and reduce interference in the received signals processed by the comparator circuit.

An RFID circuit and to a demodulator for an RFID circuit, the demodulator including an input and at least one output, a clock extractor connected to the input, a comparator connected to at least one output, a finite impulse response FIR filter arrangement connected to the input and connected to the comparator.

Some implementations provide a passive equalizer section configured to filter an input signal, the passive equalizer section including: a first passive filter that comprises: a first resistor characterized by a first resistance, and a first reactive component characterized by a first reactance, wherein the first resistor and the first reactive component are in series and connected at a first connection node; and a second passive filter that comprises: a second resistor characterized by a second resistance, and a second reactive component characterized by a second reactance, wherein the second resistor and the second reactive component are in series and connected at a second connection node; and a signal mixing section comprising a plurality of transistors to mix signals with different frequency response characteristics.

Some implementations provide a passive equalizer section configured to filter an input signal, the passive equalizer section including: a first passive filter that comprises: a first resistor characterized by a first resistance, and a first reactive component characterized by a first reactance, wherein the first resistor and the first reactive component are in series and connected at a first connection node; and a second passive filter that comprises: a second resistor characterized by a second resistance, and a second reactive component characterized by a second reactance, wherein the second resistor and the second reactive component are in series and connected at a second connection node; and a signal mixing section comprising a plurality of transistors to mix signals with different frequency response characteristics.

The method according to the invention and the device according to the invention for receiving at least one high-frequency signal (x(t)) using parallel and undersampled baseband signal processing generate a plurality of filtered signals (y.sub.1(t), y.sub.2(t), . . . , y.sub.N(t)) through parallel filtering of the high-frequency signal (x(t)), wherein each individual filtering is performed in each case by means of a different filter frequency response. An associated digitized filtered signal (y.sub.1(n.Math.T.sub.A), y.sub.2(n.Math.T.sub.A), . . . , y.sub.N(n.Math.T.sub.A)) is then generated in each case for each filtered signal (y.sub.1(t), y.sub.2(t), . . . , y.sub.N(t)) through analog-to-digital conversion of the respective filtered signal (y.sub.1(t), y.sub.2(t), . . . , y.sub.N(t)), wherein each analog-to-digital conversion is performed in each case by means of undersampling. Finally, the signal components (x.sub.1(n.Math.T.sub.A), . . . , x.sub.M(n.Math.T.sub.A); X.sub.1(k.Math.f), . . . , X.sub.M(k.Math.f)) of the high-frequency signal (x(t)) in the digital baseband are determined by means of equalization of baseband signal components (l.sub.1(n.Math.T), l.sub.2(n.Math.T.sub.A), . . . , l.sub.N(n.Math.T.sub.A); L.sub.1(k.Math.f), L.sub.2(k.Math.f), . . . , L.sub.N(k.Math.f)) of the associated digitized filtered signals (y.sub.1(t), y.sub.2(t), . . . , y.sub.N(t)). A complementary method and device for transmitting at least one high-frequency signal (z(t)) using parallel and undersampled baseband signal processing, and also a system for transmitting at least one high-frequency signal using parallel and undersampled baseband signaling processing are also encompassed by the invention.

Systems and methods are provided for utilizing low gain low noise signal amplification and ideal taps in coaxial networks. An ideal tap configured for use in coaxial networks may have a plurality of ports, one or more processing circuits configured for handling reception and transmission of signals communicated via the tap, and one or more echo cancellation circuits configured for providing echo cancellation during operations of the tap. The processing circuits are configured based on particular predefined tap performance criteria. The tap performance criteria may relate to one or more of port-to-port isolation, return loss, port-to-port gain, and up-tilt. The echo cancellation circuits may be configurable for providing the echo cancellation based on the tap performance criteria. The echo cancellation circuits may include an echo cancellation control circuit for controlling echo cancellation functions and/or operations. The echo cancellation circuits may include dedicated per-port echo cancellation circuits.

An RFID circuit and to a demodulator for an RFID circuit, the demodulator including an input and at least one output, a clock extractor connected to the input, a comparator connected to at least one output, a finite impulse response FIR filter arrangement connected to the input and connected to the comparator.

Systems, methods, and instrumentalities are disclosed for separating a channel and data without the use of reference signals. For example, a wireless transmit/receive unit (WTRU) may determine a first orthogonal frequency-division multiplexing (OFDM) symbol based on a data vector. The WTRU may determine a second OFDM symbol by applying a circular time-inverse operation and a conjugate operation to the first OFDM symbol. The WTRU may send the first OFDM symbol and the second OFDM symbol. The first and the second OFDM symbols may be sent to consecutively. Discrete Fourier Transform (DFT)-spread and nonlinear preprocessing (exponential transformation at the transmitter) may be used and/or peak-to-average power ratio (PAPR) may be reduced via randomizer block at the receiver.

In a nonlinear signal filtering system, a signal having a series of signal samples is filtered. The signal samples are affected by interactions with adjacent signal samples and nonlinear distortions. The system contains a series of alternating linear system elements and nonlinear system elements that are used for mitigation of distortion resulting from the nonlinear distortions with memory effects. The linear system elements can scale each signal sample in the series of signal samples by scaling parameters and sums a plurality of consecutive scaled signal samples, and the nonlinear system elements can transform the output of the linear system elements according to instantaneous nonlinear functions.

Disclosed embodiments relate to a system that changes transmitter and/or receiver settings to deal with reliability issues caused by a predetermined event, such as a change in a power state or a clock start event. One embodiment uses a first setting while operating a transmitter during a normal operating mode, and a second setting while operating the transmitter during a transient period following the predetermined event. A second embodiment uses similar first and second settings in a receiver, or in both a transmitter and a receiver employed on one side of a bidirectional link. The first and second settings can be associated with different swing voltages, edge rates, equalizations and/or impedances.