A substrate connection member according to various embodiments of the present invention can comprise a printed circuit board which has a plurality of layers that are stacked and which comprises a front surface, a rear surface, and a side surface encompassing the front surface and the rear surface. The printed circuit board can comprise: an opening part which encompasses a partial region of the printed circuit board and which is penetratingly formed from the front surface to the rear surface; at least one bridge connected between the partial region and the printed circuit board by crossing at least a portion of the opening part; and at least one through-hole wire formed in the partial region from the front surface to the rear surface, wherein the inner surface of the opening part and the side surface of the bridge can be formed from a conductive member. Other various embodiments, in addition to the embodiments disclosed in the present invention, are possible.

An interconnect structure includes a first conductor, a second conductor, a dielectric block, a substrate, and a pair of conductive lines. The first conductor and the second conductor form a differential pair design. The dielectric block surrounds the first conductor and the second conductor. The first conductor is separated from the second conductor by the dielectric block. The substrate surrounds the dielectric block and is spaced apart from the first conductor and the second conductor. The pair of conductive lines is connected to the first conductor and the second conductor, respectively, and extends along a top surface of the dielectric block and a top surface of the substrate.

In one embodiment, a grounding structure for a printed circuit board (PCB) of an information handling system includes: a first ground via electrically coupled to a ground layer of the PCB; a second ground via electrically coupled to the ground layer of the PCB; and a conductive strip electrically coupling the first ground via to the second ground via, the conductive strip providing a vertical ground reference for a signal transferred from a first surface of the PCB to a second surface of the PCB through a signal via disposed on the PCB.

A circuit board and an electronic package using the same are provided. The circuit board includes a rigid board body, at least one bendable extension portion, connecting members, and shielding members. The rigid board body includes conductive layers and dielectric layers therebetween. The extension portion is connected to a side of the rigid board body and formed by layers of the conductive layers and at least one layer of the dielectric layers extending outside the rigid board body. The connecting members are arranged on a connecting end of the extension portion and electrically connected to a signal layer of the conductive layers. The shielding members are arranged around the corresponding connecting members and electrically connected to a ground layer of the conductive layers. The connecting members and the shielding members protrude from the connecting end. A height of the shielding members is lower than a height of the connecting members.

An antenna module includes a multilayer board, a phased array antenna that includes antenna elements arranged on an outer face of a second conductor layer included in the multilayer board and adjusts one or more beam directions of the antenna elements, a radio frequency (RF) chip that is arranged on an outer face of first conductor layers included in the multilayer board and outputs the radio frequency signal, a matching circuit that is arranged on the outer face of the first conductor layers and adjusts matching between impedance of the antenna elements and impedance of the RF chip, a through hole that couples the first conductor layers and the second conductor layer, and one or more vias that are on an outer side in a diameter direction of the through hole and couples the first conductor layers.

The present invention provides a novel method of constructing a coax spring-pin socket that furnishes better performance and is easier to manufacture in volume using common dielectrics and copper plating. This is accomplished by, in application, a lamination of PCB dielectric layers. This dielectric block is then drilled, plated, etched, and drilled in steps for the construction of a coaxial structure for the signal pins, and a ground structure for ground pins. This design process that can be quickly adjusted and customized for each design.

An electronic device disclosed herein includes a first conductor layer, a first nonconducting layer, and a second conductor layer in a stacked arrangement. A signal carrying conductive via is formed in the first nonconducting layer and extends between the first conductor layer and the second conductor layer. A shielding conductive via is formed in the first nonconducting layer, is not electrically coupled to the signal carrying conductive via, and substantially completely surrounds the signal carrying conductive via in spaced apart relation thereto.

A resilient electrical connector assembly includes a base PCB and stacked layers of interconnected resilient conductive structures where each structure has at least two resilient conductive strips and at least two conductive contacts. One contact is integrated with a conductive path on the base PCB and another contact pad is positioned to establish a conductive path with a target PCB when the latter is mounted parallel to the base PCB. The resilient conductive strips flex due to a compressive force exerted between the base PCB and target PCB on the stacked layers. The resilient conductive structures are formed by depositing metal to sequentially form each of the stacked layers with one contact being initially formed in engagement with the conductive path on the base PCB.

A wiring substrate includes an insulating layer, and a conductor layer formed on the insulating layer and including a mesh-like conductor pattern and conductor pads such that the mesh-like conductor pattern has openings exposing the insulating layer and that the conductor pads are formed at substantially centers of selected ones or all of the openings respectively. The conductor layer is formed such that each of the openings has a polygonal shape, that gaps are formed between the conductor pads and the conductor pattern surrounding the conductor pads, and that each of the conductor pads has a curved outer edge.

A method for producing an intermediate printed circuit board product (80) with an antenna structure (5), including steps of providing a ground layer (10) including optionally a release layer (20) that is removably positioned (22) on an antenna subarea (12) of an exterior side (11) of the ground layer (10); attaching a dielectric insulating layer (30) on the exterior side (11) of the ground layer (10) that is if applicable partly covered by the release layer (20); attaching a conducting layer (40) on an exterior side (31) of the dielectric insulating layer (30); laminating of the layers (10, 20, 30, 40) to receive a first semi-finished product (50); manufacturing of an antenna cavity (60) throughout the conducting layer (40) and the dielectric insulating layer (30) with a ground-plane area (62) that is if applicable made up of the release layer (20); attaching a compound signal layer (70) on the conducting layer (40) covering the antenna cavity (60); and laminating of the layers (50, 70) to receive the intermediate product (80).