H01L21/02527

Method and use for low-temperature epitaxy and film texturing between a two-dimensional crystalline layer and metal film

A method of making a crystallographically-oriented metallic film with a two-dimensional crystal layer, comprising the steps of providing a metal film on a substrate, transferring a two-dimensional crystal layer onto the metal film and forming a two-dimensional crystal layer on metal film complex, heating the two-dimensional crystal layer on metal film complex, and forming a crystallographically-oriented metallic film with a two-dimensional crystal layer. A crystallographically-oriented metallic film with a two-dimensional crystal layer, comprising a substrate, a metal film on the substrate, a two-dimensional crystal layer on the metal film on the substrate, and a tunable microstructure within the porous metal/two-dimensional crystal layer on the substrate, wherein the metal film has crystallographic registry to the two-dimensional crystal layer.

Method for manufacturing sample for thin film property measurement and analysis, and sample manufactured thereby

The present invention relates to a method for manufacturing a sample for thin film property measurement and analysis, and a sample manufactured thereby and, more specifically, to: a method for manufacturing a sample capable of measuring or analyzing various properties in one sample; and a sample manufactured thereby.

Nanowire transistors employing carbon-based layers

Techniques are disclosed for forming nanowire transistors employing carbon-based layers. Carbon is added to the sacrificial layers and/or non-sacrificial layers of a multilayer stack forming one or more nanowires in the transistor channel region. Such carbon-based layers reduce or prevent diffusion and intermixing of the sacrificial and non-sacrificial portions of the multilayer stack. The reduction of diffusion/intermixing can allow for the originally formed layers to effectively maintain their original thicknesses, thereby enabling the formation of relatively more nanowires for a given channel region height because of the more accurate processing scheme. The techniques can be used to benefit group IV semiconductor material nanowire devices (e.g., devices including Si, Ge, and/or SiGe) and can also assist with the selective etch processing used to form the nanowires. The carbon concentration of the sacrificial and/or non-sacrificial layers can be adjusted to facilitate etch process to liberate nanowires in the channel region.

Vapor deposition of carbon-based films

Methods of forming graphene hard mask films are disclosed. Some methods are advantageously performed at lower temperatures. The substrate is exposed to an aromatic precursor to form the graphene hard mask film. The substrate comprises one or more of titanium nitride (TiN), tantalum nitride (TaN), silicon (Si), cobalt (Co), titanium (Ti), silicon dioxide (SiO.sub.2), copper (Cu), and low-k dielectric materials.

Field effect transistor, method of fabricating field effect transistor, and electronic device

A field effect transistor (FET), a method of fabricating a field effect transistor, and an electronic device, the field effect transistor comprises: a source and a drain, the source being made of a first graphene film; a channel disposed between the source and the drain, and comprising a laminate of a second graphene film and a material layer having semiconductor properties, the second graphene film being formed of bilayer graphene; and a gate disposed on the laminate and electrically insulated from the laminate.

Stack comprising single-crystal diamond substrate

A stack including at least a semiconductor drift layer stacked on a single-crystal diamond substrate having a coalescence boundary, wherein the coalescence boundary of the single-crystal diamond substrate is a region that exhibits, in a Raman spectrum at a laser excitation wavelength of 785 nm, a full width at half maximum of a peak near 1332 cm.sup.−1 due to diamond that is observed to be broader than a full width at half maximum of the peak exhibited by a region different from the coalescence boundary, the coalescence boundary has a width of 200 μm or more, and the semiconductor drift layer is stacked on at least the coalescence boundary.

LASER INDUCED FORWARD TRANSFER OF 2D MATERIALS

A system and method for performing is laser induced forward transfer (LIFT) of 2D materials is disclosed. The method includes generating a receiver substrate, generating a donor substrate, wherein the donor substrate comprises a back surface and a front surface, applying a coating to the front surface, wherein the coating includes donor material, aligning the front surface of the donor substrate to be parallel to and facing the receiver substrate, wherein the donor material is disposed adjacent to the target layer, and irradiating the coating through the back surface of the donor substrate with one or more laser pulses produced by a laser to transfer a portion of the donor material to the target layer. The donor material may include Bi.sub.2S.sub.3-xS.sub.x, MoS.sub.2, hexagonal boron nitride (h-BN) or graphene. The method may be used to create touch sensors and other electronic components.

SELECTIVE GRAPHENE DEPOSITION USING REMOTE PLASMA
20220375722 · 2022-11-24 ·

Graphene is deposited on a metal surface of a substrate using a remote hydrogen plasma chemical vapor deposition technique. The graphene may be deposited at temperatures below 400 C, which is suitable for semiconductor processing applications. Hydrogen radicals are generated in a remote plasma source located upstream of a reaction chamber, and hydrocarbon precursors are flowed into the reaction chamber downstream from the remote plasma source. The hydrocarbon precursors are activated by the hydrogen radicals under conditions to deposit graphene on the metal surface of the substrate in the reaction chamber.

LOW TEMPERATURE GRAPHENE GROWTH

Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.

Flexible graphene gas sensor, sensor array and manufacturing method thereof

The present invention relates to a surface-decorated flexible graphene self-heating gas sensor, which has a pattern of graphene formed on a flexible substrate, has a part of the pattern of graphene decorated with metal nanoparticles, and detects a gas by applying an external voltage.