Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.

A method for manufacturing a semiconductor substrate according to the present invention includes preparing a seed substrate containing a semiconductor material, forming an ion implanted layer at a certain depth from a front surface of a main surface of the seed substrate by implanting ions into the seed substrate, growing a semiconductor layer on the main surface of the seed substrate with a vapor-phase synthesis method, and separating a semiconductor substrate including the semiconductor layer and a part of the seed substrate by irradiating the front surface of the main surface of at least any of the semiconductor layer and the seed substrate with light.

A graphene compound made from the method of preparing graphene flakes or chemical vapor deposition grown graphene films on a SiO.sub.2/Si substrate; exposing the graphene flakes or the chemical vapor deposition grown graphene film to hydrogen plasma; performing hydrogenation of the graphene; wherein the hydrogenated graphene has a majority carrier type; creating a bandgap from the hydrogenation of the graphene; applying an electric field to the hydrogenated graphene; and tuning the bandgap.

Ion species are supplied to a workpiece comprising a pattern layer over a substrate. A material layer is deposited on the pattern layer using an implantation process of the ion species. In one embodiment, the deposited material layer has an etch selectivity to the pattern layer. In one embodiment, a trench is formed on the pattern layer. The trench comprises a bottom and a sidewall. The material layer is deposited into the trench using the ion implantation process. The material layer is deposited on the bottom of the trench in a direction along the sidewall.

Provided is a field effect transistor including a gate insulating layer having a two-dimensional material. The field effect transistor may include a first channel layer; a second channel layer disposed on the first channel layer; a gate insulating layer disposed on the second channel layer; a gate electrode disposed on the gate insulating layer; a first electrode electrically connected to the first channel layer; and a second electrode electrically connected to the second channel layer. Here, the gate insulating layer may include an insulative, high-k, two-dimensional material.

The invention relates to a method for manufacture of an electrical contact on a structure (10) made of an anisotropic material NA which exhibits an anisotropic electrical conductivity, where the structure (10) exhibits an axial electrical conductivity along a first axis XX′ of the structure (10) and an orthogonal conductivity along a direction YY′ orthogonal to the first axis XX′ of the structure (10), where the orthogonal conductivity is less than the axial conductivity, where the method comprises: a step for the formation of a conductive electrode (20), with an initial thickness Ei, comprising a species M, on a first surface (30) of the structure (10), where the first surface (30) is orthogonal to the orthogonal direction YY′; the method being characterized in that the step for the formation of the conductive electrode (20) is followed by a step for implantation of species X through the conductive electrode (20), into the structure (10).

Provided are a complex of heterogeneous two-dimensional materials and a method of manufacturing the same. The complex of heterogeneous two-dimensional materials may include a substrate; a first two-dimensional material layer on the substrate and having a two-dimensional crystal structure; and a second two-dimensional material layer between the substrate and the first two-dimensional material layer. The second two-dimensional material layer have a two-dimensional crystal structure in which a plurality of phosphorus atoms are covalently bonded to each other.

Provided herein are processes for transferring high quality large-area graphene layers (e.g., single-layer graphene) to a flexible substrate based on preferential adhesion of certain thin metallic films to graphene followed by lamination of the metallized graphene layers to a flexible target substrate in a process that is compatible with roll-to-roll manufacturing, providing an environmentally benign and scalable process of transferring graphene to flexible substrates.

A method of forming graphene layers is disclosed. A method of improving graphene deposition is also disclosed. Some methods are advantageously performed at lower temperatures. Some methods advantageously provide graphene layers with lower resistance. Some methods advantageously provide graphene layers in a relatively short period of time.

Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.