Patent classifications
H01L21/0254
METHODS FOR FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A DIPOLE LAYER
Methods for forming a semiconductor structure including a gallium nitride dipole layer are disclosed. An exemplary method includes using a cyclical deposition process to deposit a dipole layer comprising gallium nitride over a surface of a gate dielectric. The cyclical deposition process can include providing a gallium precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures.
High electron mobility transistor (HEMT) devices and methods
Embodiments are directed to high electron mobility transistor (HEMT) devices and methods. One such HEMT device includes a substrate having a first surface, and first and second heterostructures on the substrate and facing each other. Each of the first and second heterostructures includes a first semiconductor layer on the first surface of the substrate, a second semiconductor layer on the first surface of the substrate, and a two-dimensional electrode gas (2DEG) layer between the first and second semiconductor layers. A doped semiconductor layer is disposed between the first and second heterostructures, and a source contact is disposed on the first heterostructure and the second heterostructure.
Semiconductor layer structure
There is provided a semiconductor layer structure (100) comprising: a Si substrate (102) having a top surface (104); a first semiconductor layer (110) arranged on said substrate, the first semiconductor layer comprising a plurality of vertical nanowire structures (112) arranged perpendicularly to said top surface of said substrate, the first semiconductor layer comprising AlN; a second semiconductor layer (120) arranged on said first semiconductor layer laterally and vertically enclosing said nanowire structures, the second semiconductor layer comprising Al.sub.xGa.sub.1-xN, wherein 0≤x≤0.95; a third semiconductor layer (130) arranged on said second semiconductor layer, the third semiconductor layer comprising Al.sub.yGa.sub.1-yN, wherein 0≤y≤0.95; and a fourth semiconductor layer (140) arranged on said third semiconductor layer, the fourth semiconductor layer comprising GaN. There is also provided a high-electron-mobility transistor device and methods of producing such structures and devices.
Method and use for low-temperature epitaxy and film texturing between a two-dimensional crystalline layer and metal film
A method of making a crystallographically-oriented metallic film with a two-dimensional crystal layer, comprising the steps of providing a metal film on a substrate, transferring a two-dimensional crystal layer onto the metal film and forming a two-dimensional crystal layer on metal film complex, heating the two-dimensional crystal layer on metal film complex, and forming a crystallographically-oriented metallic film with a two-dimensional crystal layer. A crystallographically-oriented metallic film with a two-dimensional crystal layer, comprising a substrate, a metal film on the substrate, a two-dimensional crystal layer on the metal film on the substrate, and a tunable microstructure within the porous metal/two-dimensional crystal layer on the substrate, wherein the metal film has crystallographic registry to the two-dimensional crystal layer.
Method for manufacturing sample for thin film property measurement and analysis, and sample manufactured thereby
The present invention relates to a method for manufacturing a sample for thin film property measurement and analysis, and a sample manufactured thereby and, more specifically, to: a method for manufacturing a sample capable of measuring or analyzing various properties in one sample; and a sample manufactured thereby.
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a nitride semiconductor layer, an insulating layer provided on a surface of the nitride semiconductor layer, and a metal electrode in contact with the surface through an opening penetrating the insulating layer. The insulating layer includes a first SiN film having a concentration of chlorine (Cl) of 1×10.sup.20 [atoms/cm.sup.3] or more and a thickness of 30 nm or less, and a second SiN film having a concentration of chlorine (Cl) of 1×10.sup.19 [atoms/cm.sup.3] or less.
LAYERED BODY AND MANUFACTURING METHOD FOR LAYERED BODY
Included are: an underlying substrate including a first surface; a semiconductor element layer dividable into a plurality of element portions, the semiconductor element layer being located on the first surface of the underlying substrate; and a support substrate including a second surface on which the semiconductor element layer is located, the second surface facing the first surface, the semiconductor element layer being located on the second surface. The support substrate and the semiconductor element layer include a weak portion used to divide the semiconductor element layer into the plurality of element portions.
SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT
There is provided a semiconductor element containing gallium nitride. The semiconductor element includes a semiconductor layer including a first surface having a first region and a second region that is a projecting portion having a strip shape and projecting relative to the first region or a recessed portion having a strip shape and being recessed relative to the first region. Of the first surface, at least one of surfaces of the first region and the second region includes a crystal plane having a plane orientation different from a (000-1) plane orientation and a (1-100) plane orientation.
Power Semiconductor Device and Method of Producing a Power Semiconductor Device
A power semiconductor device includes a semiconductor body; a first load terminal at the semiconductor body; and a second load terminal at the semiconductor body. The power semiconductor device is configured to conduct a load current between the first load terminal and the second load terminal. The first load terminal has a first side and a second side adjoining the semiconductor body. The first load terminal includes: at the first side, an atomic layer deposition (ALD) layer; at the second side, a base layer including copper; and between the ALD layer and the base layer, a coupling layer that includes copper-silicon-nitride (CuSiN).
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device, includes attaching a first susceptor to a film forming apparatus, measuring a magnitude of a warp of the first susceptor, setting a first initial film formation condition as a film formation condition of the film forming apparatus in accordance with the measured magnitude of the warp of the first susceptor, and placing a plurality of first wafers on the first susceptor and forming a first film on the plurality of first wafers under the film formation condition. The setting of the first initial film formation condition includes reading the first initial film formation condition from a recording medium storing a database. The database includes a plurality of pieces of data in which magnitudes of warps of susceptors are associated with initial film formation conditions for forming the first film.