A method for producing an ohmic contact for an electronic part, wherein a layer consisting of a semiconductor is applied to a substrate is disclosed. A surface to be contacted of the applied semiconductor is wet-chemically etched, which is rinsed with radicals. An electrical conductor or a semiconductor is applied to the surface rinsed with radicals. An electronic component having several semiconductor layers on a substrate is also disclosed. A top layer on the one or more semiconductor layers is applied to the substrate. The top layer consists of an electrically non-conductive dielectric having an access through the top layer to a semiconductor layer, wherein adjacent semiconductor layers consist of different II-VI semiconductors. The access is at least partially filled with a II-VI semiconductor. A metallic contact applied to the II-VI semiconductor extends to the outer side of the top layer or projects outwardly relative to the top layer.

A method of manufacturing a semiconductor device includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.

A method of manufacturing a semiconductor device is disclosed herein. The method includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.

Methods of forming porous nano-scale or micro-scale structured materials and structured materials formed thereby. Such methods entail providing a donor material and reacting the donor material to form a compound that deposits on a surface of a substrate to produce nano-scale or micro-scale geometric features of the structured material. In particular embodiments, the donor material is in a solution and the reacting step is performed by contacting the surface of the substrate with the solution and directing heat through the solution onto the surface to locally heat a portion of the solution in contact therewith.

Production of a transistor, the channel structure of which comprises at least one finned channel structure, the method comprising: forming, from a substrate (1), a molding block (3), forming, on the molding block, a thin layer (7) made from a given semiconductor or semi-metallic material, and consisting of one to ten atomic or molecular monolayers of two-dimensional crystal, withdrawing the molding block while retaining a portion (7a) of the thin layer extending against a lateral face of the molding block, said retained portion (7a) forming a fin that is capable of forming a channel structure of the transistor, producing a coating gate electrode against said fin.

A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material, wherein one or more of the gas flows provides a pressure that at least contributes to the separation of the surface of the substrate from the face of the delivery head. A system capable of carrying out such a process is also disclosed.

Provided are a method of transferring a tin sulfide film and a photoelectric device using the tin sulfide film. The method includes: forming a first tin sulfide film on a first substrate; placing a second substrate on the first tin sulfide film; and forming a second tin sulfide film bonded to a surface of the second substrate by transferring a portion of the first tin sulfide film to the second substrate through a rapid thermal process (RTP).

A method of manufacturing a semiconductor device is disclosed herein. The method includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.

A method for forming a semiconductor device having a lateral semiconductor heterojunction involves forming a first metal chalcogenide layer of the lateral semiconductor heterojunction adjacent to a first metal electrode on a substrate. The first metal chalcogenide layer includes a same metal as the first metal electrode and at least some of the first metal chalcogenide layer includes metal from the first metal electrode. A second metal chalcogenide layer of the lateral semiconductor heterojunction is formed adjacent to the first metal chalcogenide layer. A second metal electrode is formed adjacent to the second metal chalcogenide layer. The second metal chalcogenide layer includes a same metal as the second metal electrode.

A method for forming a semiconductor device having a lateral semiconductor heterojunction involves forming a first metal chalcogenide layer of the lateral semiconductor heterojunction adjacent to a first metal electrode on a substrate. The first metal chalcogenide layer includes a same metal as the first metal electrode and at least some of the first metal chalcogenide layer includes metal from the first metal electrode. A second metal chalcogenide layer of the lateral semiconductor heterojunction is formed adjacent to the first metal chalcogenide layer. A second metal electrode is formed adjacent to the second metal chalcogenide layer. The second metal chalcogenide layer includes a same metal as the second metal electrode.