H01L21/02581

GALLIUM OXIDE-BASED SEMICONDUCTOR AND PRODUCTION METHOD THEREOF
20210335608 · 2021-10-28 ·

To provide a gallium oxide-based semiconductor with its bandgap being sufficiently reduced, and a manufacturing method thereof.

A gallium oxide-based semiconductor containing a mixed crystal having a composition represented by (Ga.sub.(1-x)Fe.sub.x).sub.2yO.sub.3, wherein 0.10≤x≤0.40 and 0.85≤y≤1.2, wherein the mixed crystal has a beta-gallia structure, is provided. Also, a method for manufacturing the gallium oxide-based semiconductor, including depositing a mixed crystal having a composition represented by (Ga.sub.(1-x)Fe.sub.x).sub.2yO.sub.3, wherein 0.10≤x≤0.40 and 0.85≤y≤1.2 on a substrate surface by a pulsed laser deposition method, wherein denoting the temperature of the substrate as PC, x and T satisfy the relationship represented by 500x+800≤T<1,000, is provided.

EPITAXIAL STRUCTURE
20210336011 · 2021-10-28 ·

An epitaxial structure includes a substrate, a buffer layer, a channel layer, a barrier layer, a diffusion barrier layer, and a P-type gallium nitride layer sequentially stacked from bottom to top. The P-type gallium nitride layer has a first lattice constant. The diffusion barrier layer includes a chemical composition of In.sub.x1Al.sub.y1Ga.sub.z1N, where x1+y1+z1=1, 0≤x1≤0.3, 0≤y1≤1.0, and 0≤z1≤1.0. The chemical composition of the diffusion barrier layer has a proportional relationship so that the diffusion barrier layer has a second lattice constant that matches the first lattice constant, and the second lattice constant is between 80% and 120% of the first lattice constant.

CRYSTALLINE MULTILAYER STRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING CRYSTALLINE STRUCTURE
20210335995 · 2021-10-28 ·

A crystalline multilayer structure having a high-quality crystalline layer and a semiconductor device employing such a crystalline multilayer structure are provided. A crystalline multilayer structure, including a first crystalline layer having a first crystal, and a second crystalline layer stacked on the first crystalline layer and having a second crystal, wherein the first crystal includes polycrystalline κ-Ga.sub.2O.sub.3 and the second crystal is a single crystal of a crystalline oxide.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING SEMICONDUCTOR DEVICE
20210328062 · 2021-10-21 ·

A semiconductor device including at least one inversion channel region includes an oxide semiconductor film containing a crystal that has a corundum structure at the inversion channel region.

METHOD AND SYSTEM FOR GROUP IIIA NITRIDE GROWTH
20210296113 · 2021-09-23 ·

A system and method for growing a gallium nitride (GaN) structure that includes providing a template; and growing at least a first GaN layer on the template using a first sputtering process, wherein the first sputtering process includes: controlling a temperature of a sputtering target, and modulating between a gallium-rich condition and a gallium-lean condition, wherein the gallium-rich condition includes a gallium-to-nitrogen ratio having a first value that is greater than 1, and wherein the gallium-lean condition includes the gallium-to-nitrogen ratio having a second value that is less than the first value. Some embodiments include a load lock configured to load a substrate wafer into the system and remove the GaN structure from the system; and a plurality of deposition chambers, wherein the plurality of deposition chambers includes a GaN-deposition chamber configured to grow at least the first GaN layer on a template that includes the substrate wafer.

EPITAXIAL STRUCTURE OF GAN-BASED RADIO FREQUENCY DEVICE BASED ON SI SUBSTRATE AND ITS MANUFACTURING METHOD

An epitaxial structure of a GaN-based radio frequency device based on a Si substrate and a manufacturing method thereof are provided. The epitaxial structure is composed of a Si substrate (1), an AlN nucleation layer (2), AlGaN buffer layers (3, 4, 5), a GaN:Fe/GaN high-resistance layer (6), a GaN superlattice layer (7), a GaN channel layer (8), an AlGaN barrier layer (9) and a GaN cap layer (10) which are stacked in turn from bottom to top, wherein the GaN:Fe/GaN high-resistance layer (6) is composed of an intentional Fe-doped GaN layer and an unintentional doped GaN layer which are alternately connected; the GaN superlattice layer (7) is composed of a low-pressure/low V/III ratio GaN layer and a high-pressure/high V/III ratio GaN layer which are periodically and alternately connected.

Nitride semiconductor substrate, manufacturing method therefor, and semiconductor device

Provided is a technique for manufacturing a nitride semiconductor substrate with which it is possible to manufacture a nitride semiconductor substrate having sufficiently reduced dislocation density with a large area even if manufactured on an inexpensive substrate made of sapphire, etc. A nitride semiconductor substrate in which a nitride semiconductor layer formed on a substrate is formed by laminating an undoped nitride layer and a rare earth element-added nitride layer to which a rare earth element is added as a doping material, and the dislocation density is of the order of 106 cm−2 or less. A method for manufacturing a nitride semiconductor substrate in which a step for growing GaN, InN, AlN, or a mixed crystal of two or more thereof on a substrate to form an undoped nitride layer, and a step for forming a rare earth element-added nitride layer to which a rare earth element is added so as to be substituted for Ga, In, or Al are performed via a series of formation steps using an organic metal vapor epitaxial technique at a temperature of 900 to 1200° C. without extraction from a reaction vessel.

FILM FORMING METHOD AND CRYSTALLINE MULTILAYER STRUCTURE
20210272805 · 2021-09-02 ·

The disclosure provides a film forming method that enables to obtain an epitaxial film with reduced defects such as dislocations due to a reduced facet growth industrially advantageously, even if the epitaxial film has a corundum structure. When forming an epitaxial film on a crystal-growth surface of a corundum-structured crystal substrate directly or via another layer, using the crystal substrate having an uneven portion on the crystal-growth surface of the crystal substrate, generating and floating atomized droplets by atomizing a raw material solution including a metal; carrying the floated atomized droplets onto a surface of the crystal substrate by using a carrier gas; and causing a thermal reaction of the atomized droplets in a condition of a supply rate limiting state.

Structure for increasing mobility in a high electron mobility transistor

A novel design for a nitrogen polar high-electron-mobility transistor (HEMT) structure comprising a GaN/InGaN composite channel. As A novel design for a nitrogen polar high-electron-mobility transistor (HEMT) structure comprising a GaN/InGaN composite channel. As illustrated herein, a thin InGaN layer introduced in the channel increases the carrier density, reduces the electric field in the channel, and increases the carrier mobility. The dependence of p on InGaN thickness (.sup.tInGaN) and indium composition (.sup.xIn) was investigated for different channel thicknesses. With optimized .sup.tInGaN and .sup.xIn, significant improvements in electron mobility were observed. For a 6 nm channel HEMT, the electron mobility increased from 606 to 1141 cm.sup.2/(V.Math.s) when the 6 nm thick pure GaN channel was replaced by the 4 nm GaN/2 nm In.sub.0.1Ga.sub.0.9N composite channel.

Silicon carbide substrate, method for manufacturing silicon carbide substrate, and method for manufacturing silicon carbide semiconductor device

It is an object of the present invention to provide a silicon carbide substrate having a low defect density that does not contaminate a process device and a silicon carbide semiconductor device including the silicon carbide substrate. A silicon carbide substrate according to the present invention is a silicon carbide substrate including: a substrate inner portion; and a substrate outer portion surrounding the substrate inner portion, wherein non-dopant metal impurity concentration of the substrate inner portion is 1×10.sup.16 cm.sup.−3 or more, and a region of the substrate outer portion at least on a surface side thereof is a substrate surface region in which the non-dopant metal impurity concentration is less than 1×10.sup.16 cm.sup.−3.