A semiconductor epitaxial wafer production method that can increase the peak concentration of hydrogen in a surface portion of a semiconductor wafer after epitaxial layer formation is provided. A method of producing a semiconductor epitaxial wafer comprises: a first step of irradiating a surface of a semiconductor wafer with cluster ions containing hydrogen as a constituent element, to form a modifying layer formed from, as a solid solution, a constituent element of the cluster ions including hydrogen in a surface portion of the semiconductor wafer; a second step of, after the first step, irradiating the semiconductor wafer with electromagnetic waves of a frequency of 300 MHz or more and 3 THz or less, to heat the semiconductor wafer; and a third step of, after the second step, forming an epitaxial layer on the modifying layer of the semiconductor wafer.

A method of making a nanowire device includes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.

Provided are an epitaxial silicon wafer which can reduce metal contamination by exerting higher gettering capability and a method of manufacturing the same. In a method of manufacturing an epitaxial silicon wafer which includes a silicon wafer, a first silicon epitaxial layer formed on the silicon wafer, a first modifying layer in which carbon is implanted in a surface layer portion of the first silicon epitaxial layer, and a second silicon epitaxial layer on the first modifying layer, the peak concentration of the oxygen concentration profile in the first modifying layer after formation of the second silicon epitaxial layer is set to 210.sup.17 atoms/cm.sup.3 or less and the oxygen concentration of the second silicon epitaxial layer is set to be equal to or less than the SIMS detection lower limit value.

An apparatus and method provides a drug layer formed on a surface region of a medical device, the drug layer comprised of a drug deposition and a carbonized or densified layer formed from the drug deposition by irradiation on an outer surface of the drug deposition, wherein the carbonized or densified layer does not penetrate through the drug deposition and is adapted to release drug from the drug deposition at a predetermined rate.

A method for preparing a biological material for implanting provides irradiating at least a portion of the surface of the material with an accelerated Neutral Beam.

A method of forming a variable spacer in a vertical transistor device includes forming a first source/drain of a first transistor on a substrate; forming a second source/drain of a second transistor on the substrate adjacent to the first source/drain, an isolation region arranged in the substrate between the first source/drain and the second source/drain; depositing a spacer material on the first source/drain; depositing the spacer material on the second source/drain; forming a first channel extending from the first source drain and through the spacer material; forming a second channel extending from the second source/drain and through the spacer material; wherein the spacer material on the first source/drain forms a first spacer and the spacer material on the second source/drain forms a second spacer, the first spacer being different in thickness than the second spacer.

A system and method for performing location specific processing of a workpiece is described. The method includes placing a microelectronic workpiece in a beam processing system, selecting a beam scan size for a beam scan pattern that is smaller than a dimension of the microelectronic workpiece, generating a processing beam, and processing a target region of the microelectronic workpiece by irradiating the processing beam along the beam scan pattern onto the target region within the beam scan size selected for processing the microelectronic workpiece.

Provided is a method of producing a semiconductor epitaxial wafer having enhanced gettering ability. The method of producing a semiconductor epitaxial wafer includes: a first step of irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer that is located in a surface portion of the semiconductor wafer and that includes a constituent element of the cluster ions in solid solution; and a second step of forming an epitaxial layer on the modified layer of the semiconductor wafer. The first step is performed in a state in which a temperature of the semiconductor wafer is maintained at lower than 25 C.

A method for treating a substrate surface uses Neutral Beam irradiation derived from a gas-cluster ion-beam and articles produced thereby including lithography photomask substrates.

A production method for a semiconductor epitaxial wafer includes: irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer in a surface portion of the semiconductor wafer, in which the modified layer includes a constituent element of the cluster ions in solid solution. The production method further includes forming an epitaxial layer on the modified layer of the semiconductor wafer. The irradiating is performed such that a portion of the modified layer in a thickness direction becomes an amorphous layer and an average depth of an amorphous layer surface from a semiconductor wafer surface-side of the amorphous layer is at least 20 nm from the surface of the semiconductor wafer.