A method for dielectric filling of a feature on a substrate yields a seamless dielectric fill with high-k for narrow features. In some embodiments, the method may include depositing a metal material into the feature to fill the feature from a bottom of the feature wherein the feature has an opening ranging from less than 20 nm to approximately 150 nm at an upper surface of the substrate and wherein depositing the metal material is performed using a high ionization physical vapor deposition (PVD) process to form a seamless metal gap fill and treating the seamless metal gap fill by oxidizing/nitridizing the metal material of the seamless metal gap fill with an oxidation/nitridation process to form dielectric material wherein the seamless metal gap fill is converted into a seamless dielectric gap fill with high-k dielectric material.

Provided are a graphene interconnect structure, an electronic device including the graphene interconnect structure, and a method of manufacturing the graphene interconnect structure. The graphene interconnect structure may include: a first oxide dielectric material layer; a second oxide dielectric material layer on a surface of the first oxide dielectric material layer and having a dielectric constant greater than that of the first oxide dielectric material layer; and a graphene layer on a surface of the second oxide dielectric material layer opposite to the surface on which the first oxide dielectric material layer is located.

A niobium compound and a method of forming a thin film using the niobium compound, the compound being represented by the following General formula I: ##STR00001## wherein, in General formula I, R.sup.1, R.sup.4, R.sup.5, R.sup.6, R.sup.7, and R.sup.8 are each independently a hydrogen atom, a C1-C6 linear or branched alkyl group or a C3-C6 cyclic hydrocarbon group, at least one of R.sup.4, R.sup.5, R.sup.6, R.sup.7, and R.sup.8 being a C1-C6 linear or branched alkyl group, and R.sup.2 and R.sup.3 are each independently a hydrogen atom, a halogen atom, a C1-C6 linear or branched alkyl group, or a C3-C6 cyclic hydrocarbon group.

A methodology for (a) the etching of films of Al.sub.2O.sub.3, HfO.sub.2, ZrO.sub.2, W, Mo, Co, Ru, SiN, or TiN, or (b) the deposition of tungsten onto the surface of a film chosen from Al.sub.2O.sub.3, HfO.sub.2, ZrO.sub.2, W, Mo, Co, Ru, Ir, SiN, TiN, TaN, WN, and SiO.sub.2, or (c) the selective deposition of tungsten onto metallic substrates, such as W, Mo, Co, Ru, Ir and Cu, but not metal nitrides or dielectric oxide films, which comprises exposing said films to WOCl.sub.4 in the presence of a reducing gas under process conditions.

A graphene barrier layer is disclosed. Some embodiments relate to a graphene barrier layer capable of preventing diffusion from a fill layer into a substrate surface and/or vice versa. Some embodiments relate to a graphene barrier layer that prevents diffusion of fluorine from a tungsten layer into the underlying substrate. Additional embodiments relate to electronic devices which contain a graphene barrier layer.

A device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, source/drain structures over the substrate and on opposite sides of the gate structure, and a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacer and in contact with a top surface of the gate structure.

Embodiments described herein provide circuitry employing one or more inductors having an unconventional turn-ratio. The circuitry includes a primary inductor having a first length located on a first layer of an integrated circuit (IC). The circuitry further includes a secondary inductor having a second length located on a second layer of the IC different from the first layer, whereby the second length is greater than the first length, with a ratio between the first and the second lengths corresponding to a non-integer turn-ratio.

Implementations described herein generally relate to a method for forming a metal layer and to a method for forming an oxide layer on the metal layer. In one implementation, the metal layer is formed on a seed layer, and the seed layer helps the metal in the metal layer nucleate with small grain size without affecting the conductivity of the metal layer. The metal layer may be formed using plasma enhanced chemical vapor deposition (PECVD) and nitrogen gas may be flowed into the processing chamber along with the precursor gases. In another implementation, a barrier layer is formed on the metal layer in order to prevent the metal layer from being oxidized during subsequent oxide layer deposition process. In another implementation, the metal layer is treated prior to the deposition of the oxide layer in order to prevent the metal layer from being oxidized.

To reduce warpage in at least one area of a wafer, a stress/warpage management layer (810) is formed to over-balance and change the direction of the existing warpage. For example, if the middle of the area was bulging up relative to the area's boundary, the middle of the area may become bulging downward, or vice versa. Then the stress/warpage management layer is processed to reduce the over-balancing. For example, the stress/management layer can be debonded from the wafer at selected locations, or recesses can be formed in the layer, or phase changes can be induced in the layer. In other embodiments, this layer is tantalum-aluminum that may or may not over-balance the warpage; this layer is believed to reduce warpage due to crystal-phase-dependent stresses which dynamically adjust to temperature changes so as to reduce the warpage (possibly keeping the wafer flat through thermal cycling). Other features are also provided.

A method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process is disclosed. The method may include: contacting the substrate with a first vapor phase reactant comprising a metalorganic precursor, the metalorganic precursor comprising a metal selected from the group consisting of platinum, aluminum, titanium, bismuth, zinc, and combination thereof. The method may also include; contacting the substrate with a second vapor phase reactant comprising ruthenium tetroxide, wherein the ruthenium-containing film comprises at least one of a ruthenium-platinum alloy, or a ternary ruthenium oxide. Device structures including a ruthenium-containing film deposited by the methods of the disclosure are also disclosed.