Patent classifications
H01L21/3225
Epitaxial wafer including boron and germanium and method of fabricating the same
An epitaxial wafer and a method of fabricating an epitaxial wafer, the method including providing a semiconductor substrate doped with both boron and germanium such that a sum of boron concentration and germanium concentration is at least 8.5E+18 atoms/cm.sup.3 and the germanium concentration is 6 times or less the boron concentration; forming an epitaxial layer on the semiconductor substrate such that the semiconductor substrate and the epitaxial layer constitute the epitaxial wafer; and annealing the epitaxial wafer for 1 hour or longer at a temperature of 1,000° C. or less.
SILICON WAFER AND MANUFACTURING METHOD OF THE SAME
A silicon wafer having a layer of oxygen precipitates and method of manufacturing thereof wherein the wafer exhibiting robustness characterized as having a ratio of a first average density from a first treatment that to a second average density from a second treatment is between 0.74 to 1.02, wherein the first treatment includes heating the wafer or a portion of the wafer at about 1150° C. for about 2 minutes and then between about 950 to 1000° C. for about 16 hours, and the second treatment includes heating the wafer or a portion of the wafer at about 780° C. for about 3 hours and then between about 950 to 1000° C. for about 16 hours. The wafer exhibits heretofore unattainable uniformity wherein a ratio of an oxygen precipitate density determined from any one cubic centimeter in the BMD layer of the wafer to another oxygen precipitate density from any other one cubic centimeter in the BMD layer of the wafer is in a range of 0.77 to 1.30.
Method of predicting thermal donor formation behavior in silicon wafer, method of evaluating silicon wafer, and method of producing silicon wafer
Provided is a method of accurately predicting the thermal donor formation behavior in a silicon wafer, a method of evaluating a silicon wafer using the prediction method, and a method of producing a silicon wafer using the evaluation method. The method of predicting the formation behavior of thermal donors, includes: a first step of setting an initial oxygen concentration condition before performing heat treatment on the silicon wafer for reaction rate equations based on both a bond-dissociation model of oxygen clusters associated with the diffusion of interstitial oxygen and a bonding model of oxygen clusters associated with the diffusion of oxygen dimers; a second step of calculating the formation rate of oxygen clusters formed through the heat treatment using the reaction rate equations; and a third step of calculating the formation rate of thermal donors formed through the heat treatment based on the formation rate of the oxygen clusters.
Semiconductor device and manufacturing method of semiconductor device
There is provided a semiconductor device comprising: a semiconductor substrate; an emitter region of a first conductivity type provided inside the semiconductor substrate; a base region of a second conductivity type provided below the emitter region inside the semiconductor substrate; an accumulation region of the first conductivity type provided below the base region inside the semiconductor substrate, and containing hydrogen as an impurity; and a trench portion provided to pass through the emitter region, the base region and the accumulation region from an upper surface of the semiconductor substrate.
Silicon wafer
A silicon wafer having a BMD density of 5×10.sup.8/cm.sup.3 or more and 2.5×10.sup.10/cm.sup.3 or less in a region of 80 μm to 285 μm from the wafer surface when the silicon wafer is heat-treated at a temperature X (° C., 700° C.≤X≤1000° C.) for a time Y (min) and then subjected to an infrared tomography method in which the laser power is set to 50 mW and the exposure time of a detector is set to 50 msec. The time Y and the temperature X satisfy Y=7.88×10.sup.67×X.sup.−22.5.
Semiconductor device and manufacturing method thereof
An object of the present invention is to provide stable withstand voltage characteristics, reduce turn-off losses along with a reduction in leakage current when the device is off, improve controllability of turn-off operations, and improve blocking capability at turn-off. An N buffer layer includes a first buffer layer joined to an active layer and having one peak in impurity concentration, and a second buffer layer joined to the first buffer layer and an N.sup.− drift layer, having at least one peak point in impurity concentration, and having a lower maximum impurity concentration than the first buffer layer. The impurity concentration at the peak point of the first buffer layer is higher than the impurity concentration of the N.sup.− drift layer, and the impurity concentration of the second buffer layer is higher than the impurity concentration of the N.sup.− drift layer in the entire area of the second buffer layer.
Methods for growing a nitrogen doped single crystal silicon ingot using continuous Czochralski method
A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
Semiconductor wafer composed of single-crystal silicon with high gate oxide breakdown, and a process for the manufacture thereof
Semiconductor wafers useful for NAND circuitry and having a front side, a rear side, a middle and a periphery, have an Nv region which extends from the middle to the periphery; a denuded zone which extends from the front side to a depth of not less than 20 m into the interior of the semiconductor wafer, where the density of vacancies in the denuded zone, determined by means of platinum diffusion and DLTS is not more than 110.sup.13 vacancies/cm.sup.3; a concentration of oxygen of not less than 4.510.sup.17 atoms/cm.sup.3 and not more than 5.510.sup.17 atoms/cm.sup.3; a region in the interior of the semiconductor wafer which adjoins the denuded zone and has nuclei which can be developed by means of a heat treatment into BMDs having a peak density of not less than 6.010.sup.9/cm.sup.3, where the heat treatment comprises heating the semiconductor wafer to a temperature of 800 C. over a period of four hours and to a temperature of 1000 C. over a period of 16 hours. The wafers are produced by a unique RTA treatment of Nv wafers.
Photoelectric conversion device and manufacturing method and apparatus thereof
A method for manufacturing a photoelectric conversion device, that includes: forming a laminate structure of a substrate, a transparent electrode, an active layer produced by wet-coating, and a counter electrode, stacked in this order; and thereafter forming a cavity by: (a) pressing an adhesive material just against a defect formed on the surface of said counter electrode, and then peeling off said adhesive material together with said defect and the peripheral part thereof; or (b) sucking a defect formed on the surface of said counter electrode, so as to remove said defect and the peripheral part thereof, where said cavity penetrates through the counter electrode and unreached to the transparent electrode.
Semiconductor devices with superjunction structures
A semiconductor device includes: a semiconductor substrate having a bulk oxygen concentration of at least 610.sup.17 cm.sup.3; an epitaxial layer on a first side of the semiconductor substrate, the epitaxial layer and the semiconductor substrate having a common interface; a superjunction semiconductor device structure in the epitaxial layer; and an interface region extending from the common interface into the semiconductor substrate to a depth of at least 10 m. A mean oxygen concentration of the interface region is lower than the bulk oxygen concentration of the semiconductor substrate.