H01L21/76861

PROTECTION OF SEED LAYERS DURING ELECTRODEPOSITION OF METALS IN SEMICONDUCTOR DEVICE MANUFACTURING
20220208604 · 2022-06-30 ·

A protective layer is formed over a copper seed layer on a semiconductor substrate prior to electroplating. The protective layer is capable of protecting the copper seed layer from oxidation and from dissolution in an electrolyte during initial phases of electroplating. The protective layer, in some embodiments, prevents the copper seed layer from contacting atmosphere, and from being oxidized by atmospheric oxygen and/or moisture. The protective layer contains a metal that is less noble than copper (e.g., cobalt), where the metal can be in an oxidized form that is readily soluble in a plating liquid. In one embodiment a protective cobalt layer is formed by depositing cobalt metal by chemical vapor deposition over copper seed layer without exposing the copper seed layer to atmosphere, followed by subsequent oxidation of cobalt to cobalt oxide that occurs after the substrate is exposed to atmosphere. The resulting protective layer is dissolved during electroplating.

METHOD FOR FORMING FILM
20220189778 · 2022-06-16 ·

A method of selectively forming a film on a substrate includes: a preparation process of preparing a substrate having a surface to which a metal film and an insulating film are exposed; a first removal process of removing a natural oxide film on the metal film; a first film forming process of forming a self-assembled monolayer, which suppresses formation of a titanium nitride film, on the insulating film by providing the substrate with a compound for forming the self-assembled monolayer, the compound having a functional group containing fluorine and carbon; a second film forming process of forming a titanium nitride film on the metal film; an oxidation process of oxidizing the surface of the substrate; and a second removal process of removing a titanium oxide film, which is formed on the metal film and the self-assembled monolayer, by providing the surface of the substrate with the compound.

Conformal titanium nitride-based thin films and methods of forming same

The disclosed technology generally relates to forming a titanium nitride-based thin films, and more particularly to a conformal and smooth titanium nitride-based thin films and methods of forming the same. In one aspect, a method of forming a thin film comprising one or both of TiSiN or TiAlN comprises exposing a semiconductor substrate to one or more vapor deposition cycles at a pressure in a reaction chamber greater than 1 torr, wherein a plurality of the vapor deposition cycles comprises an exposure to a titanium (Ti) precursor, an exposure to a nitrogen (N) precursor and an exposure to one or both of a silicon (Si) precursor or an aluminum (Al) precursor.

Nucleation-Free Gap Fill ALD Process

Processing methods comprise forming a gap fill layer comprising tungsten or molybdenum by exposing a substrate surface having at least one feature thereon sequentially to a metal precursor and a reducing agent comprising hydrogen to form the gap fill layer in the feature, wherein there is not a nucleation layer between the substrate surface and the gap fill layer.

Self-aligned scheme for semiconductor device and method of forming the same

Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises an interlayer dielectric (ILD) layer disposed over a substrate; a first conductive feature at least partially embedded in the ILD layer; a dielectric layer disposed over and aligned with the ILD layer, wherein a top surface of the dielectric layer is above a top surface of the first conductive feature; an etch stop layer (ESL) disposed over the dielectric layer and over the first conductive feature; and a second conductive feature disposed on the first conductive feature, wherein the second conductive feature includes a first portion having a first bottom surface contacting a top surface of the first conductive feature and a second portion having a second bottom surface contacting a top surface of the dielectric layer.

Thermal process chamber lid with backside pumping

Process chamber lid assemblies and process chambers comprising same are described. The lid assembly has a housing with a gas dispersion channel in fluid communication with a lid plate. A contoured bottom surface of the lid plate defines a gap to a top surface of a gas distribution plate. A pumping channel is formed between an upper outer peripheral contour of the gas distribution plate and the lid plate.

Method of semiconductor integrated circuit fabrication

A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.

METHODS TO IMPROVE WAFER WETTABILITY FOR PLATING - ENHANCEMENT THROUGH SENSORS AND CONTROL ALGORITHMS
20230260837 · 2023-08-17 ·

Various embodiments include methods and apparatuses to moisturize a substrate prior to an electrochemical deposition process. In one embodiment, a method to control substrate wettability includes placing a substrate in a humidification environment, controlling the humidification environment to moisturize a surface of the substrate; and placing the substrate into a plating cell. Other methods and systems are disclosed.

Method of copper plating filling

The disclosure discloses a copper plating filling process method, comprising the steps of: forming a trench or a through-hole in a dielectric layer; forming a copper seed layer on an inner surface of the hole; allowing a waiting time after forming the copper seed layer and before performing a copper plating process, wherein during the waiting time, a surface of the copper seed layer is oxidized to form a copper oxide layer; performing a reduction process on the copper oxide layer; and filling a copper layer into the hole in the copper plating process afterwards. The copper oxide layer on the surface of the copper seed layer is reduced to copper in the reduction process, and wherein a thickness of the copper seed layers on the inner surface of the hole is uniform. The hole can be a trench or a through-hole.

SEMICONDUCTOR DEVICE WITH LOW-GALVANIC CORROSION STRUCTURES, AND METHOD OF MAKING SAME
20230253249 · 2023-08-10 ·

Disclosed are methods for manufacturing semiconductor devices that include the operations of forming a first interconnect segment over a semiconductor substrate, forming a cap layer of a first metal over a top surface of the first interconnect segment, and modifying an exposed surface of the cap layer to form an organometallic film by adding ammonia to the top surface of the cap layer, reacting a portion of the ammonia with residual methyl radicals present on the top surface of the cap layer, and removing hydrogen from both the ammonia and the methyl radicals to form an organometallic film on the cap layer.