Patent classifications
H01L27/14616
Imaging device and electronic device
An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.
Semiconductor Device and Imaging Device
A semiconductor device that level-shifts a negative voltage and/or a positive voltage is provided. The semiconductor device includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, an input terminal, and an output terminal. A first terminal of the first transistor is electrically connected to a first terminal of the second transistor and the output terminal. A second terminal of the second transistor is electrically connected to a first terminal of the third transistor. A first terminal of the fourth transistor is electrically connected to a gate of the second transistor and a first terminal of the first capacitor, and a second terminal of the first capacitor is electrically connected to the input terminal. The first transistor, the second transistor, the third transistor, and the fourth transistor are of the same polarity.
Transistors having increased effective channel width
Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. At least three substrate trench structures are formed in the semiconductor substrate, defining two nonplanar structures, each having a plurality of sidewall portions. An isolation layer includes at least three isolation layer trench structures, each being disposed in a respective one of the three substrate trench structures. A gate includes three fingers, each being disposed in a respective one of the three isolation layer trench structures. An electron channel of the transistor extends along the plurality of sidewall portions of the two nonplanar structures in a channel width plane.
Global Shutter CMOS Image Sensor and Method for Making the Same
The disclosure discloses a global shutter CMOS image sensor, which adopts non-uniform storage diffusion region doping to reduce the junction leakage at storage points, so as to ensure that with the increase of the depth of photodiodes and the increase of pixels, all carriers in rows read subsequently can be transferred to storage diffusion regions, the loss of the carriers in the storage diffusion regions is not caused when a global shutter transistor is turned on, and the carriers can be completely transferred from the storage diffusion regions to floating diffusion regions through second transfer transistors even if the number of rows of pixel units increases during reading-out row by row. The disclosure further discloses a method for making the global shutter CMOS image sensor.
IMAGING DEVICE AND ELECTRONIC DEVICE
An imaging device capable of executing image processing is provided. An imaging device with low power consumption is provided. A highly reliable imaging device is provided. An imaging device with higher integration degree of pixels is provided. An imaging device manufactured at low cost is provided. The imaging device includes a photoelectric conversion device, a first transistor that is formed in a first layer and includes silicon in a channel formation layer, and a capacitor that is formed in a second layer bonded to the first layer. One of a source and a drain of the first transistor is electrically connected to one of electrodes of the photoelectric conversion device, and the other of the source and the drain of the first transistor is electrically connected to one of electrodes of the capacitor. A pixel having a function of generating first data and a function of multiplying the first data to have a given magnification to generate second data is included. The first data and the second data each have an analog value.
FINGERPRINT RECOGNITION MODULE, FABRICATING METHOD THEREOF AND DISPLAY DEVICE
The fingerprint recognition module includes: a base substrate; an image sensing layer including sensors on the base substrate; a collimating optical layer on incident sides of the sensors and including light transmitting holes formed in one-to-one correspondence with part of the sensors, an orthographic projection of each of the light transmitting holes on the base substrate being in an orthographic projection of a corresponding sensor; and a light guiding layer on a side of the collimating optical layer facing away from the sensors and including microlenses. An orthographic projection of each of the microlenses on the base substrate completely covers orthographic projections of one of the light transmitting holes and at least two sensors, and each microlens is configured to converge light rays reflected by a finger and then transmit the converged light rays to the one sensor that it covers through the one light transmitting hole that it covers.
UNIFORM-BRIDGE-GRADIENT TIME-OF-FLIGHT PHOTODIODE FOR IMAGE SENSOR PIXEL
A uniform bridge gradient (UBG) time-of-flight (ToF) photodiode block is described, such as for integration with image sensor pixels. The UBG ToF photodiode block can be part of a UBG ToF pixel, and an image sensor can include an array of such pixels. Each UGB ToF photosensor block has multiple taps for selective activation, and a photodiode region designed for complete and rapid transit of photocarriers, as they are generated, via the multiple taps. Embodiments of the photodiode region include a photodiode-defining implant, a relatively shallow first bridging implant, and relatively deep second bridging implant. The bridging implants provide lateral bridging with a uniform doping gradient near and across the multiple taps.
Unit cell of display panel including integrated TFT photodetector
A unit pixel arranged along with a display pixel in each pixel of a display panel is provided. The unit pixel may include a thin-film transistor (TFT) photodetector including an active layer formed of amorphous silicon or polycrystalline silicon on an amorphous transparent substrate, and at least one transistor electrically coupled to the TFT photodetector and configured to generate a voltage output from photocurrent generated from the active layer.
HIGH-SENSITIVITY DEPTH SENSOR WITH NON-AVALANCHE PHOTODETECTOR
A sensing device includes a light source to emit light, a light sensor to detect reflection of the emitted light and distance determination circuitry responsive to reflected-light detection within the light sensor. The light sensor includes a photodetector having a photocharge storage capacity in excess of one electron and an output circuit that generates an output signal responsive to light detection within the photodetector with sub-hundred nanosecond latency. The distance determination circuitry measures an elapsed time based on transition of the output signal in response to photonic detection within the photodetector and determines, based on the elapsed time, a distance between the sensing device and a surface that yielded the reflection of the emitted light.
IMAGE SENSOR HAVING COLUMN-LEVEL CORRELATED-DOUBLE-SAMPLING CHARGE TRANSFER AMPLIFIER
Correlated double sampling column-level readout of an image sensor pixel (e.g., a CMOS image sensor) may be provided by a charge transfer amplifier that is configured and operated to itself provide for both correlated-double-sampling and amplification of floating diffusion potentials read out from the pixel onto a column bus after reset of the floating diffusion (i) but before transferring photocharge to the floating diffusion (the reset potential) and (ii) after transferring photocharge to the floating diffusion (the transfer potential). A common capacitor of the charge transfer amplifier may sample both the reset potential and the transfer potential such that a change in potential (and corresponding charge change) on the capacitor represents the difference between the transfer potential and reset potential, and the magnitude of this change is amplified by the charge change being transferred between the common capacitor and a second capacitor selectively coupled to the common capacitor.