A junction barrier Schottky diode device and a method for fabricating the same is disclosed. In the junction barrier Schottky device includes an N-type semiconductor layer, a plurality of first P-type doped areas, a plurality of second P-type doped areas, and a conductive metal layer. The first P-type doped areas and the second P-type doped are formed in the N-type semiconductor layer. The second P-type doped areas are self-alignedly formed above the first P-type doped areas. The spacing between every neighboring two of the second P-type doped areas is larger than the spacing between every neighboring two of the first P-type doped areas. The conductive metal layer, formed on the N-type semiconductor layer, covers the first P-type doped areas and the second P-type doped areas.

A method for manufacturing a semiconductor element includes providing, on a surface of a substrate 11, a mask 12 which has an opening 12a and in which a peripheral upper surface region of the opening is processed to have a predetermined structure, and epitaxially growing a semiconductor from the surface of the substrate exposed from the opening to the top of the peripheral upper surface region to fabricate a semiconductor element having a semiconductor layer 13 with the predetermined structure transferred thereon. In one example, the predetermined structure is due to a shape having a difference in level. In another example, the predetermined structure is due to a selectively arranged element, and the transferred element moves into the semiconductor layer.

A semiconductor device includes: a semiconductor layer including a trench; an insulating film covering an inner surface of the trench; a conductor embedded in the trench covered with the insulating film; and a Schottky junction layer. A Schottky junction is formed by the Schottky junction layer and a region being part of a semiconductor layer surface and being adjacent to the trench. A surface of the conductor is located at an elevation lower than the surface of the semiconductor layer. The semiconductor layer surface includes a sloping portion adjacent to an inner wall surface of the trench. The sloping portion has a downward gradient that is steeper in a region closer to the inner wall surface.

Disclosed are a Schottky diode and a manufacturing method thereof. The Schottky diode includes a substrate, a first semiconductor layer, a heterostructure layer, a passivation layer, and a cap layer stacked in sequence. The passivation layer includes a first groove and a second groove, and the first groove and the second groove penetrate through at least the passivation layer. A first electrode is arranged at least on the cap layer corresponding to the first groove; a second electrode is arranged in the second groove. A Schottky contact is formed between the first electrode and the cap layers, so that a direct contact area between the first electrode and the heterostructure layer may be avoided, a contradiction between the forward turn-on voltage and the reverse leakage of the Schottky diode may be balanced, and a leakage characteristic of the heterostructure layer in a high temperature environment may be suppressed.

The present invention provides a GaN/two-dimensional AlN heterojunction rectifier on a silicon substrate and a preparation method therefor and belongs to the field of rectifiers. The rectifier comprises a silicon substrate, a GaN buffer layer, a carbon-doped semi-insulating GaN layer, a two-dimensional AlN layer, a non-doped GaN layer, a non-doped InGaN layer and a SiN.sub.x passivation layer that are stacked in sequence. The rectifier further comprises a mesa isolation groove and a Schottky contact electrode that are arranged at one side. The mesa isolation groove is in contact with the non-doped GaN layer, the non-doped InGaN layer, the SiN.sub.x passivation layer and the Schottky contact electrode. The Schottky contact electrode is in contact with the mesa isolation groove and the non-doped GaN layer. The thickness of the two-dimensional AlN layer is only several atomic layers, thus the received stress and polarization intensity are greater than those of the AlGaN layer.

This disclosure provides a diode including a semiconductor region having at least one two-dimensional carrier channel of a first conductivity type. The diode also includes a plurality of sidewalls exposed in the semiconductor region defining at least one trench extending through the at least one two-dimensional carrier channel and a material of a second conductivity type, the second conductivity type being the other of the n-type and the p-type conductivity, disposed on the plurality of sidewalls and in contact with the at least one two-dimensional carrier channel. The diode also includes an anode material in contact with at least a portion of the semiconductor region and in contact with at least a portion of the material of the second conductivity type, and a cathode material in contact with the at least one two-dimensional carrier channel.

Merged-PiN-Schottky, MPS, device comprising: a solid body having a first electrical conductivity; an implanted region extending into the solid body facing a front side of the solid body, having a second electrical conductivity opposite to the first electrical conductivity; and a semiconductor layer extending on the front side, of a material which is a transition metal dichalcogenide, TMD. A first region of the semiconductor layer has the second electrical conductivity and extends in electrical contact with the implanted region, and a second region of the semiconductor layer has the first electrical conductivity and extends adjacent to the first region and in electrical contact with a respective surface portion of the front side having the first electrical conductivity.

A method of manufacturing a semiconductor apparatus including a support substrate being common and plural semiconductor devices includes: inspecting, regarding each of plural semiconductor devices arranged on and supported by a support substrate being common thereto, by measuring a predetermined electrical parameter, whether a measured value satisfies a predetermined condition; and forming an electrode by forming an electrode film that is, among the plural semiconductor devices, electrically connected to a semiconductor device that has passed an inspection in the inspecting and electrically insulated from a semiconductor device that has failed the inspection in the inspecting so that the electrode film extends continuously over projected planes onto an arrangement surface of the electrode film, that is, projected planes of semiconductor devices that have passed the inspection and a projected plane of a semiconductor device that has failed the inspection, the semiconductor devices remaining supported by the common support substrate.

A layer of a crystal of a group 13 nitride selected from gallium nitride, aluminum nitride, indium nitride and the mixed crystals thereof has an upper surface and a bottom surface. The upper surface of a crystal layer of the group 13 nitride includes a linear high-luminance light-emitting part and a low-luminance light-emitting region adjacent to the high-luminance light-emitting part, observed by cathode luminescence. The high-luminance light-emitting part includes a portion extending along an m-plane of the crystal of the group 13 nitride. The crystal of the nitride of the group 13 element contains oxygen atoms in a content of 1×10.sup.18 atom/cm.sup.3 or less, silicon atoms, manganese atoms, carbon atoms, magnesium atoms and calcium atoms in contents of 1×10.sup.17 atom/cm.sup.3 or less, chromium atoms in a content of 1×10.sup.16 atom/cm.sup.3 or less and chlorine atoms in a content of 1×10.sup.15 atom/cm.sup.3 or less.

An ion implanted region is formed by implanting Mg ions into a predetermined region of the surface of the first p-type layer. Subsequently, a second n-type layer is formed on the first p-type layer and the ion implanted region. A trench is formed by dry etching a predetermined region of the surface of the second n-type layer until reaching the first n-type layer. Next, heat treatment is performed to diffuse Mg. Thus, a p-type impurity region is formed in a region with a predetermined depth from the surface of the first n-type layer below the ion implanted region. Since the trench is formed before the heat treatment, Mg is not diffused laterally beyond the trench. Therefore, the width of the p-type impurity region is almost the same as the width of the first p-type layer divided by the trench.