In this semiconductor device, a trench is formed on the upper surface of an n-type semiconductor layer laminated on a semiconductor substrate, a Schottky junction with metal is formed on the upper surface of an n-type region forming one side surface of the trench, and a pn junction is formed on the upper surface of an n-type region forming the other side surface of the trench. The pn junction is formed by a junction between the n-type region and the p-type semiconductor layer crystal-grown via epitaxial growth on the upper surface of the n-type region forming the other side surface.

A Group III-Nitride (III-N) device structure is presented comprising: a heterostructure having three or more layers comprising III-N material, a cathode comprising donor dopants, wherein the cathode is on a first layer of the heterostructure, an anode within a recess that extends through two or more of the layers of the heterostructure, wherein the anode comprises a first region wherein the anode is separated from the heterostructure by a high k dielectric material, and a second region wherein the anode is in direct contact with the heterostructure, and a conducting region in the first layer in direct contact to the cathode and conductively connected to the anode. Other embodiments are also disclosed and claimed.

A semiconductor device includes: a semiconductor substrate; a first semiconductor layer of a first conductivity type thereon; a second semiconductor layer of a second conductivity type deposited using epitaxial growth on a bottom of the first semiconductor layer; a trench including a lateral surface constituted by the first semiconductor layer and a bottom surface at least partly constituted by the second semiconductor layer; an insulating film that covers the bottom surface and the lateral surface; a conductive body inside the trench; and a metal film electrically connected to the conductive body and forms a Schottky barrier with a surface of the first semiconductor layer. The second semiconductor layer constitutes all or a middle portion of the bottom surface and is within the trench in a plan view of the substrate.

A diode is disclosed. The diode includes a semiconductor substrate, a hard mask formed above the substrate, vertically oriented components of a first material adjacent sides of the hard mask, and laterally oriented components of the first material on top of the hard mask. The laterally oriented components are oriented in a first direction and a second direction. The diode also includes a second material on top of the first material. The second material forms a Schottky barrier.

A semiconductor device includes: a semiconductor substrate; a semiconductor layer of a first conductivity type that is deposited on a surface of the semiconductor substrate; a trench that is formed on a surface of the semiconductor layer; an insulating film that covers a bottom surface of the trench and a lateral surface of the trench; a conductive body that fills inside the trench that is covered by the insulating film; a second conductive type region that is formed in the semiconductor layer, is arranged under the trench, and is within a region of the trench in a plan view of the semiconductor substrate; and a metal film that is electrically connected to the conductive body and forms a Schottky barrier with the surface of the semiconductor layer.

A group III nitride transistor structure capable of reducing a leakage current and a fabricating method thereof are provided. The group III nitride transistor structure includes: a first heterojunction and a second heterojunction which are laminated, wherein the first heterojunction is electrically isolated from the second heterojunction via a high resistance material and/or insertion layer; a first electrode, a second electrode and a first gate which are matched with the first heterojunction, wherein a third semiconductor is arranged between the first gate and the first heterojunction, and the first gate is also electrically connected with the first electrode; a source, a drain and a second gate which are matched with the second heterojunction, wherein the source and the drain are also respectively electrically connected with the first gate and the second electrode, and a sixth semiconductor is arranged between the second gate and the second heterojunction.

The present disclosure relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes a semiconductor heterostructure layer and a conductive structure. The semiconductor heterostructure layer includes alternating first semiconductor material layers and second semiconductor material layers. 2DHGs may be generated between each first semiconductor material layer and adjacent second semiconductor material layer. The conductive structure includes a plurality of conductive fingers extending from a surface of the semiconductor heterostructure layer into the semiconductor heterostructure layer. The plurality of conductive fingers are arranged in a direction substantially parallel to the surface. The lengths of the plurality of conductive fingers progressively increase in that direction, so that an end portion of each conductive finger is respectively positioned in a different second semiconductor material layer and is not in contact with the 2DHG.

A Schottky diode comprises: a first electrode; a second electrode; and a body of semiconductive material connected to the first electrode at a first interface and connected to the second electrode at a second interface, wherein the first interface comprises a first planar region lying in a first plane and the first electrode has a first projection onto the first plane in a first direction normal to the first plane, the second interface comprises a second planar region lying in a second plane and the second electrode has a second projection onto the first plane in said first direction, at least a portion of the second projection lies outside the first projection, said second planar region is offset from the first planar region in said first direction, and one of the first interface and the second interface provides a Schottky contact.

An integrated electronic device includes a first terminal and a second terminal, a Schottky diode having a first threshold voltage and coupled between the first terminal and the second terminal, a derivation component having a second threshold voltage greater than the first threshold voltage and coupled between the first terminal and the second terminal. The derivation component comprises a super-junction.

A semiconductor device and a method for manufacturing the same are provided in this disclosure. The semiconductor device includes a semiconductor heterostructure layer. The semiconductor heterostructure layer includes alternating first semiconductor material layers and second semiconductor material layers. Two-dimensional electron gas (2DEG) may be generated between each first semiconductor material layer and adjacent second semiconductor material layer. A conductive structure, including a plurality of conductive fingers extends from a surface of the semiconductor heterostructure layer into the semiconductor heterostructure layer. The plurality of conductive fingers are arranged in a direction substantially parallel to the surface. The lengths of the plurality of conductive fingers progressively increase in that direction so that an end portion of each conductive finger is respectively positioned in a different first semiconductor material layer and is in contact with the 2DEG.