Patent classifications
H01L2224/24221
DOUBLE-SIDED MULTICHIP PACKAGES
An electronic device package and method of fabricating such a package includes a first and second components encapsulated in a volume of molding material. A surface of the first component is bonded to a surface of the second component. Upper and lower sets of redistribution lowers that include, respectively, first and second sets of conductive interconnects are formed on opposite sides of the molding material. A through-package interconnect passes through the volume of molding material and has ends that terminate, respectively, within the upper set of redistribution layers and within the lower set of redistribution layers.
Microelectronic assemblies formed using metal silicide, and methods of fabrication
Two microelectronic components (110, 120), e.g. a die and an interposer, are bonded to each other. One of the components' contact pads (110C) include metal, and the other component has silicon (410) which reacts with the metal to form metal silicide (504). Then a hole (510) is made through one of the components to reach the metal silicide and possibly even the unreacted metal (110C) of the other component. The hole is filled with a conductor (130), possibly metal, to provide a conductive via that can be electrically coupled to contact pads (120C.B) attachable to other circuit elements or microelectronic components, e.g. to a printed circuit board.
SEMICONDUCTOR PACKAGE
A semiconductor package may include a first wiring structure including a plurality of first redistribution patterns and a plurality of first redistribution insulating layers, a second wiring structure on the first wiring structure and including a plurality of second redistribution patterns and a plurality of second redistribution insulating layers, a semiconductor chip between the first wiring structure and the second wiring structure, an expanded layer including a plurality of connection structures electrically connecting the first wiring structure and the second wiring structure to each other and an encapsulant surrounding the plurality of connection structures and the semiconductor chip, a ceramic shield layer between the expanded layer and the second wiring structure, and a plurality of via structures penetrating the ceramic shield layer and electrically connecting the plurality of connection structures and the plurality of second redistribution patterns to each other.
MICROELECTRONIC ASSEMBLIES FORMED USING METAL SILICIDE, AND METHODS OF FABRICATION
Two microelectronic components (110, 120), e.g. a die and an interposer, are bonded to each other. One of the components' contact pads (110C) include metal, and the other component has silicon (410) which reacts with the metal to form metal silicide (504). Then a hole (510) is made through one of the components to reach the metal silicide and possibly even the unreacted metal (110C) of the other component. The hole is filled with a conductor (130), possibly metal, to provide a conductive via that can be electrically coupled to contact pads (120C.B) attachable to other circuit elements or microelectronic components, e.g. to a printed circuit board.