H01L2224/24998

Sensing die encapsulated by an encapsulant with a roughness surface having a hollow region

A semiconductor device includes an encapsulant including a first hollow region, a sensing die in the first hollow region of the encapsulant, and a redistribution structure disposed on the encapsulant and the sensing die and electrically coupled to the sensing die. A top width of the hollow region is greater than a bottom width of the hollow region. The redistribution structure includes a second hollow region which exposes a sensing area of the sensing die, and the redistribution structure is slanted downward from an edge of the device toward the sensing area.

Power electronic switching device, arrangement herewith and methods for producing the switching device

A switching device has a substrate, a connection device and a pressure device, wherein the substrate has electrically insulated conductor tracks, and a power semiconductor component is on one of the conductor tracks with a first main surface and is conductively connected thereto. The connection device is a film composite with conductive film and an insulating film and forms a first and a second main surface. The switching device is connected by the connection device and a contact area of the second main surface of the power semiconductor component is connected to a first contact area of the first main surface of the connection device in a force-locking and electrically conductive manner with a pressure body and a pressure element projecting toward the power semiconductor component.

Semiconductor devices with integrated thin-film transistor circuitry

Various embodiments include a semiconductor device with thin-film transistor (TFT) circuitry monolithically integrated with other non-TFT functional devices. One example is an integrated LED display panel, in which an array of LEDs is integrated with corresponding TFT driver circuitry. The TFT driver circuitry typically is an array of pixel drivers that drive the LEDs.

METHOD FOR INTEGRATING AT LEAST ONE 3D INTERCONNECTION FOR THE MANUFACTURE OF AN INTEGRATED CIRCUIT
20180254258 · 2018-09-06 · ·

The invention relates to a method for integrating at least one interconnection for the manufacture of an integrated circuit, including a step of depositing at least one insulating body onto a substrate including a horizontal surface, said insulating body comprising a first wall extending from the horizontal surface of the substrate to a high point of said insulating body and a step of depositing a one-piece electrical structure which is made of an electrically conductive material and extends on the horizontal surface of the substrate and the first wall of the insulating body, the first wall being vertically angled by more than 10 m and having a rising slope extending from the horizontal surface of the substrate to the high point of said insulating body.

MANUFACTURING METHOD OF SENSING DIE ENCAPSULATED BY ENCAPSULANT WITH ROUGHNESS SURFACE HAVING HOLLOW REGION

A manufacturing method of a semiconductor package includes: laterally covering a sensing die with an encapsulant, where the encapsulant includes a top surface and a rounded inner edge connected to the top surface, and a top surface of the sensing die is lower than the rounded inner edge of the encapsulant and is smoother than the top surface of the encapsulant; and forming a redistribution structure on the top surface of the encapsulant and the top surface of the sensing die.

PATTERNED STRUCTURE FOR ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF

The present invention provides a patterned structure for an electronic device and a manufacturing method thereof. The patterned structure includes a patterned layer, a blocking structure, a cantilever structure, and a connection structure. The patterned layer is disposed on a substrate. The blocking structure is disposed on the substrate at one side of the patterned layer, wherein a thickness of the blocking structure is smaller than a thickness of the patterned layer. The cantilever structure is disposed on the substrate and located between the patterned layer and the blocking structure. The cantilever structure is connected with the patterned layer and the blocking structure. The connection structure is connected between the patterned layer and the substrate at one side of the patterned layer, and located on the cantilever structure and the blocking structure.

INK PRINTED WIRE BONDING
20180114778 · 2018-04-26 ·

An integrated circuit package with improved reliability and methods for creating the same are disclosed. More specifically, integrated circuit packages are created using one or more sacrificial layers that provide support for ink printed wires prior to package processing, but are removed during package processing. Once each of the sacrificial layers is removed, molding compound is placed around each ink printed wire, which may have a substantially rectangular cross section that can vary in dimension along a length of a given wire. While substantially surrounding each wire in and of itself improves reliability, removing non-conductive paste, fillets, or other adhesive materials also minimizes adhesion issues between the molding compound and those materials, which increases the bond of the molding compound to the package and its components. The net result is a more reliable integrated circuit package that is less susceptible to internal cracking and wire damage.

SEMICONDUCTOR DEVICE PACKAGE INTERCONNECT AND MANUFACTURING METHOD THEREOF

A semiconductor device package, and method of manufacture is provided. The device includes a die, a substrate, a first connection area and a second connection area, the first connection area providing an electrical connection to the die, the second connection area providing an electrical connection to a substrate bond pad, and the first and connection area facing in the same direction. A non-conductive material is applied and cured between an edge of the first connection area and an edge of the second connection area and along a side of the die, and a conductive material is applied and cured between the first connection area and the second connection area and along a surface of the cured non-conductive material.

POWER ELECTRONIC SWITCHING DEVICE, ARRANGEMENT HEREWITH AND METHODS FOR PRODUCING THE SWITCHING DEVICE

A switching device has a substrate, a connection device and a pressure device, wherein the substrate has electrically insulated conductor tracks, and a power semiconductor component is on one of the conductor tracks with a first main surface and is conductively connected thereto. The connection device is a film composite with conductive film and an insulating film and forms a first and a second main surface. The switching device is connected by the connection device and a contact area of the second main surface of the power semiconductor component is connected to a first contact area of the first main surface of the connection device in a force-locking and electrically conductive manner with a pressure body and a pressure element projecting toward the power semiconductor component.

Ink printed wire bonding

An integrated circuit package with improved reliability and methods for creating the same are disclosed. More specifically, integrated circuit packages are created using one or more sacrificial layers that provide support for ink printed wires prior to package processing, but are removed during package processing. Once each of the sacrificial layers is removed, molding compound is placed around each ink printed wire, which may have a substantially rectangular cross section that can vary in dimension along a length of a given wire. While substantially surrounding each wire in and of itself improves reliability, removing non-conductive paste, fillets, or other adhesive materials also minimizes adhesion issues between the molding compound and those materials, which increases the bond of the molding compound to the package and its components. The net result is a more reliable integrated circuit package that is less susceptible to internal cracking and wire damage.