A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, ranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

A display device includes a display substrate, a signal pad part, an insulating layer, a connection pad part, and an electronic component. The signal pad part includes first and second signal pad parts, which face each other in one direction. The insulating layer covers the signal pad part. The connection pad part is disposed on the insulating layer and includes a first connection pad part overlapping the first signal pad part and a second connection pad part. The second connection pad part is electrically connected to the first connection pad part and is in electrical contact with the second signal pad part through a contact hole defined in the insulating layer. The electronic component includes a bump that is in electrical contact with the first connection pad part. The first signal pad part includes a plurality of signal pad portions spaced apart from each other.

Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations. In one embodiment, an integrated circuit (IC) assembly includes a package substrate having a first side and a second side disposed opposite to the first side, a first die having an active side coupled with the first side of the package substrate and an inactive side disposed opposite to the active side, the first die having one or more through-silicon vias (TSVs) configured to route electrical signals between the first die and a second die, and a mold compound disposed on the first side of the package substrate, wherein the mold compound is in direct contact with a sidewall of the first die between the active side and the inactive side and wherein a distance between the first side and a terminating edge of the mold compound that is farthest from the first side is equal to or less than a distance between the inactive side of the first die and the first side. Other embodiments may be described and/or claimed.

In accordance with one aspect of the disclosure, an electronic assembly comprises a semiconductor device with a first side and a second side opposite the first side. The first side has a first conductive pad. The second side has a primary metallic surface. A first substrate (e.g. lead frame) is bonded to a first conductive pad via first metallic bonding layer. A second substrate (e.g., heat sinking circuit board) is bonded to a primary metallic surface via a second metallic bonding layer. In one configuration the second metallic bonding layer is composed of solder and copper, for example.

Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations. In one embodiment, an integrated circuit (IC) assembly includes a package substrate having a first side and a second side disposed opposite to the first side, a first die having an active side coupled with the first side of the package substrate and an inactive side disposed opposite to the active side, the first die having one or more through-silicon vias (TSVs) configured to route electrical signals between the first die and a second die, and a mold compound disposed on the first side of the package substrate, wherein the mold compound is in direct contact with a sidewall of the first die between the active side and the inactive side and wherein a distance between the first side and a terminating edge of the mold compound that is farthest from the first side is equal to or less than a distance between the inactive side of the first die and the first side. Other embodiments may be described and/or claimed.

A semiconductor device, includes a semiconductor chip which includes: first and second terminals; a first conductive film pattern for the first terminal, formed over an interlayer insulation film; an insulation film formed over the interlayer insulation film so as to cover the first conductive film pattern; a first opening for the first terminal formed in the insulation film, and for exposing a part of the first conductive film pattern; and a nickel film formed over the first conductive film pattern at a portion thereof exposed from the first opening, wherein a semiconductor element controls a conduction between the first terminal and the second terminal, wherein the first terminal is formed of the first conductive film pattern and the nickel film, wherein the first conductive film pattern is formed of a lamination film having a first conductor film containing aluminum, and a second conductor film.

A semiconductor device, includes a semiconductor chip which includes: first and second terminals; a first conductive film pattern for the first terminal, formed over an interlayer insulation film; an insulation film formed over the interlayer insulation film so as to cover the first conductive film pattern; a first opening for the first terminal formed in the insulation film, and for exposing a part of the first conductive film pattern; and a nickel film formed over the first conductive film pattern at a portion thereof exposed from the first opening, wherein a semiconductor element controls a conduction between the first terminal and the second terminal, wherein the first terminal is formed of the first conductive film pattern and the nickel film, wherein the first conductive film pattern is formed of a lamination film having a first conductor film containing aluminum, and a second conductor film.

In a light emitting device, in a bottom surface of a cavity of a Si substrate, slit-shaped through holes and through electrodes that fill the through holes are provided at a position facing a first element electrode of a light emitting element. A length of an upper surface of the through electrode in a long axis direction is larger than a height of the through electrode in a thickness direction of the Si substrate. A joining layer having a shape corresponding to a shape of the upper surface of the through electrode is disposed between the first element electrode of the light emitting element and the upper surface of the through electrode facing the first element electrode. The entire upper surface of the through electrode is joined to the first element electrode via the joining layer.